CD74HCT109M96

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Texas Instruments

HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET

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CD74HCT109M96

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Texas Instruments

HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET

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Description Specifications Series Pricing CAD Documents

Description

General part information

74HCT109 Series

The ’HC109 and ’HCT109 are dual J-K\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).

The flip-flop is set and reset by active-low S\ and R\, respectively. A low on both the set and reset inputs simultaneously will force both Q and Q\ outputs high. However, both set and reset going high simultaneously results in an unpredictable output condition.

The ’HC109 and ’HCT109 are dual J-K\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).

Technical Specifications

Parameters and characteristics for this part

Specification	CD74HCT109M96

Clock Frequency	54 MHz
Current - Output High	4 mA
Current - Output Low	4 mA
Current - Quiescent (Iq)	4 µA
Function	Set(Preset) and Reset
Input Capacitance	10 pF
Max CL	50 pF
Max Propagation Delay	40 ns
Mounting Type	Surface Mount
Number of Bits per Element	1 bits
Number of Elements	2
Operating Temperature (Max)	125 °C
Operating Temperature (Min)	-55 °C
Output Type	Complementary
Package Length	0.154 in
Package Name	16-SOIC
Package Width	3.9 mm
Trigger Type	Positive Edge
Type	JK Type
Voltage - Supply (Maximum)	5.5 V
Voltage - Supply (Minimum)	4.5 V

74HCT109 Series

Part	Max Propagation Delay	Max CL	Current - Output Low	Current - Output High	Package Name	Output Type	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Type	Trigger Type	Number of Elements	Clock Frequency	Mounting Type	Number of Bits per Element	Operating Temperature (Max)	Operating Temperature (Min)	Input Capacitance	Function	Package Width	Package Length	Current - Quiescent (Iq)
Texas Instruments CD74HCT109M96	40 ns	50 pF	4 mA	4 mA	16-SOIC	Complementary	5.5 V	4.5 V	JK Type	Positive Edge	2	54 MHz	Surface Mount	1 bits	125 °C	-55 °C	10 pF	Set(Preset) and Reset	3.9 mm	0.154 in	4 µA
Texas Instruments CD74HCT109E	40 ns	50 pF	4 mA	4 mA	16-DIP 16-PDIP	Complementary	5.5 V	4.5 V	JK Type	Positive Edge	2	54 MHz	Through Hole	1 bits	125 °C	-55 °C	10 pF	Set(Preset) and Reset	7.62 mm	0.3 in	4 µA
Texas Instruments CD74HCT109MT	40 ns	50 pF	4 mA	4 mA	16-SOIC	Complementary	5.5 V	4.5 V	JK Type	Positive Edge	2	54 MHz	Surface Mount	1 bits	125 °C	-55 °C	10 pF	Set(Preset) and Reset	3.9 mm	0.154 in	4 µA
Texas Instruments CD74HCT109M	40 ns	50 pF	4 mA	4 mA	16-SOIC	Complementary	5.5 V	4.5 V	JK Type	Positive Edge	2	54 MHz	Surface Mount	1 bits	125 °C	-55 °C	10 pF	Set(Preset) and Reset	3.9 mm	0.154 in	4 µA

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 datasheet (Rev. E)