CD74HCT597MT
ActiveHIGH SPEED CMOS LOGIC 8-BIT SHIFT REGISTER WITH INPUT STORAGE
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CD74HCT597MT
ActiveHIGH SPEED CMOS LOGIC 8-BIT SHIFT REGISTER WITH INPUT STORAGE
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Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | CD74HCT597MT | 74HCT597 Series |
|---|---|---|
| Function | Parallel to Serial | Parallel to Serial |
| Logic Type | Shift Register | Shift Register |
| Mounting Type | Surface Mount | Through Hole, Surface Mount |
| Number of Bits per Element | 8 | 8 |
| Number of Elements [custom] | 1 | 1 |
| Operating Temperature [Max] | 125 °C | 125 °C |
| Operating Temperature [Min] | -55 °C | -55 °C |
| Output Type | Push-Pull | Push-Pull |
| Package / Case | 16-SOIC | 16-DIP, 16-SOIC |
| Package / Case | 3.9 mm Width, 0.154 in | 0.154 - 7.62 in |
| Supplier Device Package | 16-SOIC | 16-PDIP, 16-SOIC |
| Voltage - Supply [Max] | 5.5 V | 5.5 V |
| Voltage - Supply [Min] | 4.5 V | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
74HCT597 Series
High Speed CMOS Logic 8-Bit Shift Register with Input Storage
| Part | Function | Output Type | Number of Bits per Element | Logic Type | Mounting Type | Supplier Device Package | Voltage - Supply [Max] | Voltage - Supply [Min] | Package / Case | Package / Case | Number of Elements [custom] | Operating Temperature [Min] | Operating Temperature [Max] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD74HCT597EThe ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high.
The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high. | Parallel to Serial | Push-Pull | 8 | Shift Register | Through Hole | 16-PDIP | 5.5 V | 4.5 V | 0.3 in, 7.62 mm | 16-DIP | 1 | -55 °C | 125 °C |
Texas Instruments CD74HCT597MTThe ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high.
The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high. | Parallel to Serial | Push-Pull | 8 | Shift Register | Surface Mount | 16-SOIC | 5.5 V | 4.5 V | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | -55 °C | 125 °C |
Texas Instruments CD74HCT597M96The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high.
The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high. | Parallel to Serial | Push-Pull | 8 | Shift Register | Surface Mount | 16-SOIC | 5.5 V | 4.5 V | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | -55 °C | 125 °C |
Texas Instruments CD74HCT597MThe ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high.
The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high. | Parallel to Serial | Push-Pull | 8 | Shift Register | Surface Mount | 16-SOIC | 5.5 V | 4.5 V | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | -55 °C | 125 °C |
Description
General part information
74HCT597 Series
The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high.
The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high.
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