
SN74AHCT1G14DCK3
ObsoleteTexas Instruments
SINGLE 4.5-V TO 5.5-V INVERTER WITH SCHMITT-TRIGGER INPUTS

SN74AHCT1G14DCK3
ObsoleteTexas Instruments
SINGLE 4.5-V TO 5.5-V INVERTER WITH SCHMITT-TRIGGER INPUTS
Description
General part information
74AHCT1G14 Series
The SN74AHCT1G14 contains a single inverter gate. The device performs the Boolean function Y = A.
The SN74AHCT1G14 contains a single inverter gate. The device performs the Boolean function Y = A.
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74AHCT1G14DCK3 |
|---|---|
| Current - Output High | 8 mA |
| Current - Output Low | 8 mA |
| Current - Quiescent (Max) | 1 µA |
| Features | Schmitt Trigger |
| Input Logic Level - High | 2 V |
| Input Logic Level - Low (Max) | 0.6 V |
| Input Logic Level - Low (Min) | 0.5 V |
| Logic Type | Inverter |
| Max CL | 50 pF |
| Max Propagation Delay | 8 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Number of Inputs | 1 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | SOT-353, SC-70-5, 5-TSSOP |
| Package Name | SC-70-5 |
| Voltage - Supply (Maximum) | 5.5 V |
| Voltage - Supply (Minimum) | 4.5 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
SN74AHCT1G14 Single Schmitt-Trigger Inverter Gate datasheet (Rev. R)
Logic Guide (Rev. AB)
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Little Logic Guide 2018 (Rev. G)
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Design Summary for WCSP Little Logic (Rev. B)
Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)
AHC/AHCT Designer's Guide February 2000 (Rev. D)
CMOS Power Consumption and CPD Calculation (Rev. B)
Texas Instruments Little Logic Application Report
Implications of Slow or Floating CMOS Inputs (Rev. E)
LOGIC Pocket Data Book (Rev. B)
Understanding Schmitt Triggers (Rev. B)
Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)
Selecting the Right Level Translation Solution (Rev. A)
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
How to Select Little Logic (Rev. A)
TI IBIS File Creation, Validation, and Distribution Processes
Live Insertion