
CD74HCT540M
Active8-CH, 4.5-V TO 5.5-V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS
Deep-Dive with AI
Search across all available documentation for this part.

CD74HCT540M
Active8-CH, 4.5-V TO 5.5-V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS
Technical Specifications
Parameters and characteristics commom to parts in this series
Specification | CD74HCT540M | 74HCT540 Series |
---|---|---|
Current - Output High, Low [custom] | 6 mA | 6 mA |
Current - Output High, Low [custom] | 6 mA | 6 mA |
Logic Type | Inverting, Buffer | Inverting, Buffer |
Mounting Type | Surface Mount | Surface Mount, Through Hole |
Number of Bits per Element | 8 | 8 |
Number of Elements [custom] | 1 | 1 |
Operating Temperature [Max] | 125 °C | 85 - 125 °C |
Operating Temperature [Min] | -55 C | -55 - -40 °C |
Output Type | 3-State | 3-State |
Package / Case | 7.5 mm, 0.295 in | 0.295 - 7.5 mm |
Package / Case | 20-SOIC | 20-SOIC, 20-DIP |
Package / Case | - | 0.3 in |
Package / Case | - | 7.62 mm |
Supplier Device Package | 20-SOIC | 20-SOIC, 20-PDIP |
Voltage - Supply [Max] | 5.5 V | 5.5 V |
Voltage - Supply [Min] | 4.5 V | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
74HCT540 Series
8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs
Part | Output Type | Supplier Device Package | Voltage - Supply [Max] | Voltage - Supply [Min] | Package / Case | Package / Case | Number of Elements [custom] | Current - Output High, Low [custom] | Current - Output High, Low [custom] | Operating Temperature [Max] | Operating Temperature [Min] | Mounting Type | Logic Type | Number of Bits per Element | Package / Case | Package / Case |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
3-State | 20-SOIC | 5.5 V | 4.5 V | 0.295 in, 7.5 mm | 20-SOIC | 1 | 6 mA | 6 mA | 85 °C | -40 °C | Surface Mount | Buffer, Inverting | 8 | |||
3-State | 20-SOIC | 5.5 V | 4.5 V | 0.295 in, 7.5 mm | 20-SOIC | 1 | 6 mA | 6 mA | 125 °C | -55 C | Surface Mount | Buffer, Inverting | 8 | |||
Texas Instruments SN74HCT540DWRThese octal buffers and line drivers are designed to have the performance of the ’HCT240 devices and a pinout with inputs and outputs on opposite sides of the package. This arrangement greatly facilitates printed circuit board layout.
The 3-state control gate is a 2-input NOR. If either output-enable (OE1\ or OE2\) input is high, all eight outputs are in the high-impedance state. The ’HCT540 devices provide inverted data at the outputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These octal buffers and line drivers are designed to have the performance of the ’HCT240 devices and a pinout with inputs and outputs on opposite sides of the package. This arrangement greatly facilitates printed circuit board layout.
The 3-state control gate is a 2-input NOR. If either output-enable (OE1\ or OE2\) input is high, all eight outputs are in the high-impedance state. The ’HCT540 devices provide inverted data at the outputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. | 3-State | 20-SOIC | 5.5 V | 4.5 V | 0.295 in, 7.5 mm | 20-SOIC | 1 | 6 mA | 6 mA | 85 °C | -40 °C | Surface Mount | Buffer, Inverting | 8 | ||
3-State | 20-PDIP | 5.5 V | 4.5 V | 20-DIP | 1 | 6 mA | 6 mA | 125 °C | -55 C | Through Hole | Buffer, Inverting | 8 | 0.3 in | 7.62 mm | ||
3-State | 20-SOIC | 5.5 V | 4.5 V | 0.295 in, 7.5 mm | 20-SOIC | 1 | 6 mA | 6 mA | 125 °C | -55 C | Surface Mount | Buffer, Inverting | 8 |
Description
General part information
74HCT540 Series
These octal buffers and line drivers are designed to have the performance of the ’HCT240 devices and a pinout with inputs and outputs on opposite sides of the package. This arrangement greatly facilitates printed circuit board layout.
The 3-state control gate is a 2-input NOR. If either output-enable (OE1\ or OE2\) input is high, all eight outputs are in the high-impedance state. The ’HCT540 devices provide inverted data at the outputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Documents
Technical documentation and resources