Zenode.ai Logo
CD74HCT4060M96 - https://ti.com/content/dam/ticom/images/products/package/d/d0016a.png

CD74HCT4060M96

Active
Texas Instruments

HIGH SPEED CMOS LOGIC 14-STAGE BINARY COUNTER WITH OSCILLATOR

Deep-Dive with AI

Search across all available documentation for this part.

CD74HCT4060M96 - https://ti.com/content/dam/ticom/images/products/package/d/d0016a.png

CD74HCT4060M96

Active
Texas Instruments

HIGH SPEED CMOS LOGIC 14-STAGE BINARY COUNTER WITH OSCILLATOR

Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationCD74HCT4060M96CD74HCT4060 Series
Count Rate30 MHz30 MHz
DirectionUpUp
Logic TypeBinary CounterBinary Counter
Mounting TypeSurface MountSurface Mount, Through Hole
Number of Bits per Element1414
Number of Elements [custom]11
Operating Temperature [Max]125 °C125 °C
Operating Temperature [Min]-55 C-55 C
Package / Case16-SOIC16-SOIC, 16-DIP
Package / Case3.9 mm Width, 0.154 in0.154 - 7.62 mm Width
ResetAsynchronousAsynchronous
Supplier Device Package16-SOIC16-SOIC, 16-PDIP
Trigger TypeNegative EdgeNegative Edge
Voltage - Supply [Max]5.5 V5.5 V
Voltage - Supply [Min]4.5 V4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

CD74HCT4060 Series

High Speed CMOS Logic 14-Stage Binary Counter with Oscillator

PartNumber of Elements [custom]Number of Bits per ElementResetVoltage - Supply [Max]Voltage - Supply [Min]Logic TypeSupplier Device PackageDirectionCount RateOperating Temperature [Min]Operating Temperature [Max]Trigger TypePackage / CasePackage / CaseMounting Type
Texas Instruments
CD74HCT4060M96
The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels. The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels.
1
14
Asynchronous
5.5 V
4.5 V
Binary Counter
16-SOIC
Up
30 MHz
-55 C
125 °C
Negative Edge
16-SOIC
0.154 in, 3.9 mm Width
Surface Mount
Texas Instruments
CD74HCT4060M
The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels. The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels.
1
14
Asynchronous
5.5 V
4.5 V
Binary Counter
16-SOIC
Up
30 MHz
-55 C
125 °C
Negative Edge
16-SOIC
0.154 in, 3.9 mm Width
Surface Mount
Texas Instruments
CD74HCT4060E
The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels. The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels.
1
14
Asynchronous
5.5 V
4.5 V
Binary Counter
16-PDIP
Up
30 MHz
-55 C
125 °C
Negative Edge
16-DIP
0.3 in, 7.62 mm
Through Hole
Texas Instruments
CD74HCT4060MT
The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels. The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels.
1
14
Asynchronous
5.5 V
4.5 V
Binary Counter
16-SOIC
Up
30 MHz
-55 C
125 °C
Negative Edge
16-SOIC
0.154 in, 3.9 mm Width
Surface Mount

Description

General part information

CD74HCT4060 Series

The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times.

In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels.

The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times.