CD74HCT4046AMT

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Texas Instruments

HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO

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Search across all available documentation for this part.

DocumentsCD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A datasheet (Rev. J)

CD74HCT4046AMT

Active

Texas Instruments

HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO

Deep-Dive with AI

DocumentsCD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A datasheet (Rev. J)

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics commom to parts in this series

Specification	CD74HCT4046AMT	CD74HCT4046A Series

Differential - Input:Output [custom]	False	False
Differential - Input:Output [custom]	False	False
Divider/Multiplier [custom]	False	False
Divider/Multiplier [custom]	False	False
Frequency - Max [Max]	38 MHz	38 MHz
Input	CMOS	CMOS
Mounting Type	Surface Mount	Surface Mount, Through Hole
Number of Circuits	1	1
Operating Temperature [Max]	125 °C	125 °C
Operating Temperature [Min]	-55 °C	-55 °C
Output	CMOS	CMOS
Package / Case	16-SOIC	16-SOIC, 16-DIP
Package / Case	3.9 mm Width, 0.154 in	0.154 - 7.62 mm Width
PLL	True	True
Ratio - Input:Output [custom]	4	4
Ratio - Input:Output [custom]	1	1
Supplier Device Package	16-SOIC	16-SOIC, 16-PDIP
Type	Phase Lock Loop (PLL)	Phase Lock Loop (PLL)
Voltage - Supply [Max]	5.5 V	5.5 V
Voltage - Supply [Min]	4.5 V	4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.24
		10	$ 1.10
		25	$ 1.05
		100	$ 0.86
	Digi-Reel®	1	$ 1.24
		10	$ 1.10
		25	$ 1.05
		100	$ 0.86
	Tape & Reel (TR)	250	$ 0.61
		500	$ 0.56
		750	$ 0.54
		1250	$ 0.51
		1750	$ 0.49
		2500	$ 0.47
		6250	$ 0.46
Texas Instruments	SMALL T&R	1	$ 1.14
		100	$ 0.77
		250	$ 0.60
		1000	$ 0.40

CD74HCT4046A Series

High Speed CMOS Logic Phase-Locked-Loop with VCO

Part	Package / Case	Package / Case	Supplier Device Package	Output	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Min]	Operating Temperature [Max]	Input	Frequency - Max [Max]	Ratio - Input:Output [custom]	Ratio - Input:Output [custom]	Number of Circuits	Type
Texas Instruments CD74HCT4046AMT The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.	16-SOIC	0.154 in, 3.9 mm Width	16-SOIC	CMOS	Surface Mount	5.5 V	4.5 V	-55 °C	125 °C	CMOS	38 MHz	4	1	1	Phase Lock Loop (PLL)
Texas Instruments CD74HCT4046AM The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.	16-SOIC	0.154 in, 3.9 mm Width	16-SOIC	CMOS	Surface Mount	5.5 V	4.5 V	-55 °C	125 °C	CMOS	38 MHz	4	1	1	Phase Lock Loop (PLL)
Texas Instruments CD74HCT4046AE The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.	16-DIP	0.3 in, 7.62 mm	16-PDIP	CMOS	Through Hole	5.5 V	4.5 V	-55 °C	125 °C	CMOS	38 MHz	4	1	1	Phase Lock Loop (PLL)
Texas Instruments CD74HCT4046AM96 The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.	16-SOIC	0.154 in, 3.9 mm Width	16-SOIC	CMOS	Surface Mount	5.5 V	4.5 V	-55 °C	125 °C	CMOS	38 MHz	4	1	1	Phase Lock Loop (PLL)

Description

General part information

CD74HCT4046A Series

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.

The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.

The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.

Documents

Technical documentation and resources

CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A datasheet (Rev. J)

Data sheet