
TLIN1024RGYTQ1
ActiveQUAD LIN TRANSCEIVER 24-VQFN -40 TO 125
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TLIN1024RGYTQ1
ActiveQUAD LIN TRANSCEIVER 24-VQFN -40 TO 125
Technical Specifications
Parameters and characteristics commom to parts in this series
Specification | TLIN1024RGYTQ1 | TLIN1024-Q1 Series |
---|---|---|
Data Rate | 20 kbps | 20 kbps |
Grade | Automotive | Automotive |
Mounting Type | Surface Mount | Surface Mount |
Number of Drivers/Receivers [custom] | 4 | 4 |
Number of Drivers/Receivers [custom] | 4 | 4 |
Operating Temperature [Max] | 125 °C | 125 °C |
Operating Temperature [Min] | -40 °C | -40 °C |
Package / Case | 24-VFQFN Exposed Pad | 24-VFQFN Exposed Pad |
Protocol | LINbus | LINbus |
Qualification | AEC-Q100 | AEC-Q100 |
Receiver Hysteresis | 200 mV | 200 mV |
Supplier Device Package | 24-VQFN (5.5x3.5) | 24-VQFN (5.5x3.5) |
Type | Transceiver | Transceiver |
Voltage - Supply [Max] | 36 VDC | 36 VDC |
Voltage - Supply [Min] | 4 V | 4 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
TLIN1024-Q1 Series
Quad LIN Transceiver
Part | Protocol | Qualification | Supplier Device Package | Receiver Hysteresis | Type | Voltage - Supply [Min] | Voltage - Supply [Max] | Grade | Mounting Type | Number of Drivers/Receivers [custom] | Number of Drivers/Receivers [custom] | Operating Temperature [Min] | Operating Temperature [Max] | Data Rate | Package / Case |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments TLIN1024RGYTQ1The TLIN1024-Q1 device is a quad Local Interconnect Network (LIN) physical layer transceiver, which integrates wake up and protection features, compliant to LIN2.0, LIN2.1, LIN2.2, LIN2.2A and ISO/DIS 17987–4.2 standards. LIN is a single wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The LIN receiver supports data rates up to 100 kbps for in-line programming. The TLIN1024-Q1 has two separate dual LIN transceiver blocks. The VSUP1/2control separate dual transceiver blocks. The TLIN1024-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-shaping driver which reduces electromagnetic emissions (EME). The receiver converts the data stream to logic level signals that are sent to the microprocessor through the open-drain RXD pin. Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or EN pin. The integrated resistor, electrostatic discharge (ESD) protection, and fault protection allow designers to save board space in their applications.
The TLIN1024-Q1 device is a quad Local Interconnect Network (LIN) physical layer transceiver, which integrates wake up and protection features, compliant to LIN2.0, LIN2.1, LIN2.2, LIN2.2A and ISO/DIS 17987–4.2 standards. LIN is a single wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The LIN receiver supports data rates up to 100 kbps for in-line programming. The TLIN1024-Q1 has two separate dual LIN transceiver blocks. The VSUP1/2control separate dual transceiver blocks. The TLIN1024-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-shaping driver which reduces electromagnetic emissions (EME). The receiver converts the data stream to logic level signals that are sent to the microprocessor through the open-drain RXD pin. Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or EN pin. The integrated resistor, electrostatic discharge (ESD) protection, and fault protection allow designers to save board space in their applications. | LINbus | AEC-Q100 | 24-VQFN (5.5x3.5) | 200 mV | Transceiver | 4 V | 36 VDC | Automotive | Surface Mount | 4 | 4 | -40 °C | 125 °C | 20 kbps | 24-VFQFN Exposed Pad |
Texas Instruments TLIN1024RGYRQ1The TLIN1024-Q1 device is a quad Local Interconnect Network (LIN) physical layer transceiver, which integrates wake up and protection features, compliant to LIN2.0, LIN2.1, LIN2.2, LIN2.2A and ISO/DIS 17987–4.2 standards. LIN is a single wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The LIN receiver supports data rates up to 100 kbps for in-line programming. The TLIN1024-Q1 has two separate dual LIN transceiver blocks. The VSUP1/2control separate dual transceiver blocks. The TLIN1024-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-shaping driver which reduces electromagnetic emissions (EME). The receiver converts the data stream to logic level signals that are sent to the microprocessor through the open-drain RXD pin. Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or EN pin. The integrated resistor, electrostatic discharge (ESD) protection, and fault protection allow designers to save board space in their applications.
The TLIN1024-Q1 device is a quad Local Interconnect Network (LIN) physical layer transceiver, which integrates wake up and protection features, compliant to LIN2.0, LIN2.1, LIN2.2, LIN2.2A and ISO/DIS 17987–4.2 standards. LIN is a single wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The LIN receiver supports data rates up to 100 kbps for in-line programming. The TLIN1024-Q1 has two separate dual LIN transceiver blocks. The VSUP1/2control separate dual transceiver blocks. The TLIN1024-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-shaping driver which reduces electromagnetic emissions (EME). The receiver converts the data stream to logic level signals that are sent to the microprocessor through the open-drain RXD pin. Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or EN pin. The integrated resistor, electrostatic discharge (ESD) protection, and fault protection allow designers to save board space in their applications. | LINbus | AEC-Q100 | 24-VQFN (5.5x3.5) | 200 mV | Transceiver | 4 V | 36 VDC | Automotive | Surface Mount | 4 | 4 | -40 °C | 125 °C | 20 kbps | 24-VFQFN Exposed Pad |
Description
General part information
TLIN1024-Q1 Series
The TLIN1024-Q1 device is a quad Local Interconnect Network (LIN) physical layer transceiver, which integrates wake up and protection features, compliant to LIN2.0, LIN2.1, LIN2.2, LIN2.2A and ISO/DIS 17987–4.2 standards. LIN is a single wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The LIN receiver supports data rates up to 100 kbps for in-line programming. The TLIN1024-Q1 has two separate dual LIN transceiver blocks. The VSUP1/2control separate dual transceiver blocks. The TLIN1024-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-shaping driver which reduces electromagnetic emissions (EME). The receiver converts the data stream to logic level signals that are sent to the microprocessor through the open-drain RXD pin. Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or EN pin. The integrated resistor, electrostatic discharge (ESD) protection, and fault protection allow designers to save board space in their applications.
The TLIN1024-Q1 device is a quad Local Interconnect Network (LIN) physical layer transceiver, which integrates wake up and protection features, compliant to LIN2.0, LIN2.1, LIN2.2, LIN2.2A and ISO/DIS 17987–4.2 standards. LIN is a single wire bidirectional bus typically used for low speed in-vehicle networks using data rates up to 20 kbps. The LIN receiver supports data rates up to 100 kbps for in-line programming. The TLIN1024-Q1 has two separate dual LIN transceiver blocks. The VSUP1/2control separate dual transceiver blocks. The TLIN1024-Q1 converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-shaping driver which reduces electromagnetic emissions (EME). The receiver converts the data stream to logic level signals that are sent to the microprocessor through the open-drain RXD pin. Ultra-low current consumption is possible using the sleep mode which allows wake up via LIN bus or EN pin. The integrated resistor, electrostatic discharge (ESD) protection, and fault protection allow designers to save board space in their applications.