
CDCE706PW
Active300-MHZ, LVCMOS, PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 20-TSSOP -40 TO 85
Deep-Dive with AI
Search across all available documentation for this part.

CDCE706PW
Active300-MHZ, LVCMOS, PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER 20-TSSOP -40 TO 85
Deep-Dive with AI
Technical Specifications
Parameters and characteristics commom to parts in this series
Specification | CDCE706PW | CDCE706 Series |
---|---|---|
Differential - Input:Output | Yes/No | Yes/No |
Frequency - Max [Max] | 300 MHz | 300 MHz |
Input | LVCMOS, Crystal | LVCMOS, Crystal |
Mounting Type | Surface Mount | Surface Mount |
Number of Circuits | 1 | 1 |
Operating Temperature [Max] | 85 °C | 85 °C |
Operating Temperature [Min] | -40 °C | -40 °C |
Output | LVCMOS | LVCMOS |
Package / Case | 0.173 in | 0.173 in |
Package / Case | 4.4 mm | 4.4 mm |
Package / Case | 20-TSSOP | 20-TSSOP |
PLL | Yes with Bypass | Yes with Bypass |
Ratio - Input:Output [custom] | 6 | 6 |
Ratio - Input:Output [custom] | 1 | 1 |
Supplier Device Package | 20-TSSOP | 20-TSSOP |
Type | - | Spread Spectrum Clock Driver |
Voltage - Supply [Max] | 3.6 V | 3.6 V |
Voltage - Supply [Min] | 3 V | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Distributor | Package | Quantity | $ | |
---|---|---|---|---|
Chip One Stop | Tube | 1 | $ 8.57 | |
10 | $ 6.81 | |||
50 | $ 6.43 | |||
DigiKey | Bulk | 49 | $ 6.17 | |
Tube | 1 | $ 9.71 | ||
10 | $ 7.57 | |||
70 | $ 6.57 | |||
140 | $ 6.33 | |||
280 | $ 6.13 | |||
560 | $ 5.97 | |||
1050 | $ 5.84 | |||
Digikey | Tube | 1 | $ 10.26 | |
10 | $ 9.27 | |||
70 | $ 8.84 | |||
140 | $ 7.67 | |||
280 | $ 7.33 | |||
560 | $ 6.68 | |||
1050 | $ 5.82 | |||
Mouser Electronics | N/A | 1 | $ 9.58 | |
10 | $ 7.52 | |||
25 | $ 7.51 | |||
70 | $ 6.30 | |||
280 | $ 6.13 | |||
560 | $ 5.96 | |||
1050 | $ 5.90 | |||
Quest Components | N/A | 1 | $ 12.33 | |
2 | $ 8.22 | |||
4 | $ 6.17 | |||
Rochester Electronics | N/A | 1 | $ 6.82 | |
25 | $ 6.68 | |||
100 | $ 6.41 | |||
500 | $ 6.14 | |||
1000 | $ 5.80 | |||
Texas Instruments | TUBE | 1 | $ 9.03 | |
100 | $ 7.36 | |||
250 | $ 5.79 | |||
1000 | $ 4.91 |
CDCE706 Series
300-MHz, LVCMOS, programmable 3-PLL clock synthesizer / multiplier / divider
Part | Mounting Type | Voltage - Supply [Max] | Voltage - Supply [Min] | Number of Circuits | Operating Temperature [Min] | Operating Temperature [Max] | Package / Case | Package / Case | Package / Case | Frequency - Max [Max] | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Supplier Device Package | Differential - Input:Output | PLL | Input | Output | Type |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDCE706PW | Surface Mount | 3.6 V | 3 V | 1 | -40 °C | 85 °C | 0.173 in | 4.4 mm | 20-TSSOP | 300 MHz | 6 | 1 | 20-TSSOP | Yes/No | Yes with Bypass | Crystal, LVCMOS | LVCMOS | |
Texas Instruments CDCE706PWR | Surface Mount | 3.6 V | 3 V | 1 | -40 °C | 85 °C | 0.173 in | 4.4 mm | 20-TSSOP | 300 MHz | 6 | 1 | 20-TSSOP | Yes/No | Yes with Bypass | Crystal, LVCMOS | LVCMOS | Spread Spectrum Clock Driver |
Texas Instruments CDCE706PWG4 | Surface Mount | 3.6 V | 3 V | 1 | -40 °C | 85 °C | 0.173 in | 4.4 mm | 20-TSSOP | 300 MHz | 6 | 1 | 20-TSSOP | Yes/No | Yes with Bypass | Crystal, LVCMOS | LVCMOS | Spread Spectrum Clock Driver |
Texas Instruments CDCE706PWRG4 | Surface Mount | 3.6 V | 3 V | 1 | -40 °C | 85 °C | 0.173 in | 4.4 mm | 20-TSSOP | 300 MHz | 6 | 1 | 20-TSSOP | Yes/No | Yes with Bypass | Crystal, LVCMOS | LVCMOS | Spread Spectrum Clock Driver |
Description
General part information
CDCE706 Series
The CDCE706 is one of the smallest and powerful PLL synthesizer / multiplier / divider available today. Despite its small physical outlines, the CDCE706 is very flexible. It has the capability to produce an almost independent output frequency from a given input frequency.
The input frequency can be derived from a LVCMOS, differential input clock, or a single crystal. The appropriate input waveform can be selected via the SMBus data interface controller.
To achieve an independent output frequency the reference divider M and the feedback divider N for each PLL can be set to values from 1 up to 511 for the M-Divider and from 1 up to 4095 for the N-Divider. The PLL-VCO (voltage controlled oscillator) frequency than is routed to the free programmable output switching matrix to any of the six outputs. The switching matrix includes an additional 7-bit post-divider (1-to-127) and an inverting logic for each output.
Documents
Technical documentation and resources