SN74LV574ADGVR

Active

Texas Instruments

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Deep-Dive with AI

Search across all available documentation for this part.

DocumentsSN74LV574A Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. K)Power-Up Behavior of Clocked Devices (Rev. B)

SN74LV574ADGVR

Active

Texas Instruments

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsSN74LV574A Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. K)Power-Up Behavior of Clocked Devices (Rev. B)

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics commom to parts in this series

Specification	SN74LV574ADGVR	74LV574 Series

Clock Frequency	-	205 MHz
Current - Output High, Low [custom]	16 mA	16 mA
Current - Output High, Low [custom]	16 mA	16 mA
Current - Quiescent (Iq)	20 çA	20 çA
Function	Standard	Standard
Input Capacitance	1.8 pF	1.8 pF
Max Propagation Delay @ V, Max CL	5.7 ns	5.7 - 10.6 ns
Mounting Type	Surface Mount	Surface Mount
Number of Bits per Element	8	8
Number of Elements [custom]	1	1
Operating Temperature [Max]	85 °C	85 °C
Operating Temperature [Min]	-40 °C	-40 °C
Output Type	Tri-State, Non-Inverted	Tri-State, Non-Inverted
Package / Case	20-TFSOP	20-VFQFN Exposed Pad, 20-SSOP, 20-SOIC, 20-VFBGA, 20-TSSOP, 20-TFSOP
Package / Case	4.4 mm	4.4 mm
Package / Case	0.173 in	0.173 - 4.4 mm
Package / Case	-	0.173 - 7.5 mm
Supplier Device Package	20-TVSOP	20-VQFN (3.5x4.5), 20-SSOP, 20-SOIC, 20-BGA MICROSTAR JUNIOR (4x3), 20-TSSOP, 20-TVSOP, 20-SO
Trigger Type	Positive Edge	Positive Edge
Type	D-Type	D-Type
Voltage - Supply [Max]	5.5 V	5.5 V
Voltage - Supply [Min]	2 V	2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.09
	Digi-Reel®	1	$ 1.09
	Tape & Reel (TR)	2000	$ 0.46
		6000	$ 0.44
		10000	$ 0.42
Texas Instruments	LARGE T&R	1	$ 0.89
		100	$ 0.68
		250	$ 0.50
		1000	$ 0.36

74LV574 Series

Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL	Output Type	Function	Input Capacitance	Type	Number of Elements [custom]	Trigger Type	Supplier Device Package	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Current - Quiescent (Iq)	Number of Bits per Element	Package / Case	Clock Frequency	Package / Case	Package / Case
Texas Instruments SN74LV574ARGYR The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	10.6 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-VQFN (3.5x4.5)	16 mA	16 mA	20-VFQFN Exposed Pad	2 V	5.5 V	Surface Mount	20 çA	8
Texas Instruments SN74LV574ADBR The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	10.6 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-SSOP	16 mA	16 mA	20-SSOP	2 V	5.5 V	Surface Mount	20 çA	8	0.209 in, 5.3 mm
Texas Instruments SN74LV574ADWR The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	10.6 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-SOIC	16 mA	16 mA	20-SOIC	2 V	5.5 V	Surface Mount	20 çA	8	0.295 in, 7.5 mm
Texas Instruments SN74LV574ADW The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	10.6 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-SOIC	16 mA	16 mA	20-SOIC	2 V	5.5 V	Surface Mount	20 çA	8	0.295 in, 7.5 mm
Texas Instruments SN74LV574AGQNR Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-VFBGA	85 °C	-40 °C	5.7 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-BGA MICROSTAR JUNIOR (4x3)	16 mA	16 mA	20-VFBGA	2 V	5.5 V	Surface Mount	20 çA	8		205 MHz
Texas Instruments SN74LV574APW The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	10.6 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-TSSOP	16 mA	16 mA	20-TSSOP	2 V	5.5 V	Surface Mount	20 çA	8	0.173 in		4.4 mm
Texas Instruments SN74LV574APWR The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	5.7 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-TSSOP	16 mA	16 mA	20-TSSOP	2 V	5.5 V	Surface Mount	20 çA	8	0.173 in	205 MHz	4.4 mm
Texas Instruments SN74LV574ADGVR The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	5.7 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-TVSOP	16 mA	16 mA	20-TFSOP	2 V	5.5 V	Surface Mount	20 çA	8			0.173 in	4.4 mm
Texas Instruments SN74LV574AZQNR Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-VFBGA	85 °C	-40 °C	10.6 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-BGA MICROSTAR JUNIOR (4x3)	16 mA	16 mA	20-VFBGA	2 V	5.5 V	Surface Mount	20 çA	8
Texas Instruments SN74LV574APWT The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	10.6 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-TSSOP	16 mA	16 mA	20-TSSOP	2 V	5.5 V	Surface Mount	20 çA	8	0.173 in		4.4 mm
Texas Instruments SN74LV574ANSR The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.	85 °C	-40 °C	10.6 ns	Tri-State, Non-Inverted	Standard	1.8 pF	D-Type	1	Positive Edge	20-SO	16 mA	16 mA	20-SOIC	2 V	5.5 V	Surface Mount	20 çA	8	0.209 in, 5.3 mm

Description

General part information

74LV574 Series

The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation.

These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

Documents

Technical documentation and resources

SN74LV574A Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. K)

Data sheet

Power-Up Behavior of Clocked Devices (Rev. B)

Application note