The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.

During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.

When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.Read more