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CD74HCT4046AM96

Active
Texas Instruments

HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO

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CD74HCT4046AM96 - https://ti.com/content/dam/ticom/images/products/package/d/d0016a.png

CD74HCT4046AM96

Active
Texas Instruments

HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO

Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationCD74HCT4046AM96CD74HCT4046A Series
Differential - Input:Output [custom]FalseFalse
Differential - Input:Output [custom]FalseFalse
Divider/Multiplier [custom]FalseFalse
Divider/Multiplier [custom]FalseFalse
Frequency - Max [Max]38 MHz38 MHz
InputCMOSCMOS
Mounting TypeSurface MountSurface Mount, Through Hole
Number of Circuits11
Operating Temperature [Max]125 °C125 °C
Operating Temperature [Min]-55 °C-55 °C
OutputCMOSCMOS
Package / Case16-SOIC16-SOIC, 16-DIP
Package / Case3.9 mm Width, 0.154 in0.154 - 7.62 mm Width
PLLTrueTrue
Ratio - Input:Output [custom]44
Ratio - Input:Output [custom]11
Supplier Device Package16-SOIC16-SOIC, 16-PDIP
TypePhase Lock Loop (PLL)Phase Lock Loop (PLL)
Voltage - Supply [Max]5.5 V5.5 V
Voltage - Supply [Min]4.5 V4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

CD74HCT4046A Series

High Speed CMOS Logic Phase-Locked-Loop with VCO

PartPackage / CasePackage / CaseSupplier Device PackageOutputDifferential - Input:Output [custom]Differential - Input:Output [custom]Divider/Multiplier [custom]Divider/Multiplier [custom]Mounting TypeVoltage - Supply [Max]Voltage - Supply [Min]Operating Temperature [Min]Operating Temperature [Max]InputPLLFrequency - Max [Max]Ratio - Input:Output [custom]Ratio - Input:Output [custom]Number of CircuitsType
Texas Instruments
CD74HCT4046AMT
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.
16-SOIC
0.154 in, 3.9 mm Width
16-SOIC
CMOS
Surface Mount
5.5 V
4.5 V
-55 °C
125 °C
CMOS
38 MHz
4
1
1
Phase Lock Loop (PLL)
Texas Instruments
CD74HCT4046AM
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.
16-SOIC
0.154 in, 3.9 mm Width
16-SOIC
CMOS
Surface Mount
5.5 V
4.5 V
-55 °C
125 °C
CMOS
38 MHz
4
1
1
Phase Lock Loop (PLL)
Texas Instruments
CD74HCT4046AE
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.
16-DIP
0.3 in, 7.62 mm
16-PDIP
CMOS
Through Hole
5.5 V
4.5 V
-55 °C
125 °C
CMOS
38 MHz
4
1
1
Phase Lock Loop (PLL)
Texas Instruments
CD74HCT4046AM96
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.
16-SOIC
0.154 in, 3.9 mm Width
16-SOIC
CMOS
Surface Mount
5.5 V
4.5 V
-55 °C
125 °C
CMOS
38 MHz
4
1
1
Phase Lock Loop (PLL)

Description

General part information

CD74HCT4046A Series

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.

The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.

The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.