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5962-8970801EA - NATNSCLF13508D

5962-8970801EA

Active
Texas Instruments

HIGH SPEED CMOS LOGIC INVERTING QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS

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DocumentsLOGIC Pocket Data Book (Rev. B)Implications of Slow or Floating CMOS Inputs (Rev. E)+10
5962-8970801EA - NATNSCLF13508D

5962-8970801EA

Active
Texas Instruments

HIGH SPEED CMOS LOGIC INVERTING QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsLOGIC Pocket Data Book (Rev. B)Implications of Slow or Floating CMOS Inputs (Rev. E)+10
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Specification5962-8970801EA
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CD54HCT258 Series

High Speed CMOS Logic Inverting Quad 2-Input Multiplexer with 3-State Outputs

Part
Texas Instruments
5962-8970801EA
These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G)\ input is at a high logic level. To ensure the high-impedance state during power up or power down, G\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G)\ input is at a high logic level. To ensure the high-impedance state during power up or power down, G\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Description

General part information

CD54HCT258 Series

These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G)\ input is at a high logic level.

To ensure the high-impedance state during power up or power down, G\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G)\ input is at a high logic level.