CD74HCT174M
ActiveHIGH SPEED CMOS LOGIC HEX D-TYPE FLIP-FLOP WITH RESET
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CD74HCT174M
ActiveHIGH SPEED CMOS LOGIC HEX D-TYPE FLIP-FLOP WITH RESET
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Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | CD74HCT174M | CD74HCT174 Series |
|---|---|---|
| Clock Frequency | 25 MHz | 25 MHz |
| Current - Output High, Low | 4 mA, 4 mA | 4 mA |
| Current - Quiescent (Iq) | 8 ÁA | 8 ÁA |
| Input Capacitance | 10 pF | 10 pF |
| Max Propagation Delay @ V, Max CL | 40 ns | 40 ns |
| Mounting Type | Surface Mount | Surface Mount |
| Number of Bits per Element | 6 | 6 |
| Number of Elements [custom] | 1 | 1 |
| Operating Temperature [Max] | 125 °C | 125 °C |
| Operating Temperature [Min] | -55 C | -55 C |
| Output Type | Non-Inverted | Non-Inverted |
| Package / Case | 16-SOIC | 16-SOIC |
| Package / Case | 3.9 mm Width, 0.154 in | 0.154 - 3.9 mm Width |
| Supplier Device Package | 16-SOIC | 16-SOIC |
| Trigger Type | Positive Edge | Positive Edge |
| Type | D-Type | D-Type |
| Voltage - Supply [Max] | 5.5 V | 5.5 V |
| Voltage - Supply [Min] | 4.5 V | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
CD74HCT174 Series
High Speed CMOS Logic Hex D-Type Flip-Flop with Reset
| Part | Mounting Type | Package / Case | Package / Case | Supplier Device Package | Number of Elements [custom] | Current - Output High, Low | Voltage - Supply [Max] | Voltage - Supply [Min] | Trigger Type | Max Propagation Delay @ V, Max CL | Number of Bits per Element | Input Capacitance | Clock Frequency | Current - Quiescent (Iq) | Operating Temperature [Min] | Operating Temperature [Max] | Type | Output Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD74HCT174MThe ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174.
The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174. | Surface Mount | 16-SOIC | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | 4 mA, 4 mA | 5.5 V | 4.5 V | Positive Edge | 40 ns | 6 | 10 pF | 25 MHz | 8 ÁA | -55 C | 125 °C | D-Type | Non-Inverted |
Texas Instruments CD74HCT174M96The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174.
The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174. | Surface Mount | 16-SOIC | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | 4 mA, 4 mA | 5.5 V | 4.5 V | Positive Edge | 40 ns | 6 | 10 pF | 25 MHz | 8 ÁA | -55 C | 125 °C | D-Type | Non-Inverted |
Texas Instruments CD74HCT174MTThe ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174.
The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174. | Surface Mount | 16-SOIC | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | 4 mA, 4 mA | 5.5 V | 4.5 V | Positive Edge | 40 ns | 6 | 10 pF | 25 MHz | 8 ÁA | -55 C | 125 °C | D-Type | Non-Inverted |
Description
General part information
CD74HCT174 Series
The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174.
The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
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