CD54HCT175F3A
ActiveHIGH SPEED CMOS LOGIC QUAD D-TYPE FLIP-FLOPS WITH RESET
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CD54HCT175F3A
ActiveHIGH SPEED CMOS LOGIC QUAD D-TYPE FLIP-FLOPS WITH RESET
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Technical Specifications
Parameters and characteristics for this part
| Specification | CD54HCT175F3A |
|---|---|
| Clock Frequency | 25 MHz |
| Current - Output High, Low | 5.2 mA, 5.2 mA |
| Current - Quiescent (Iq) | 8 ÁA |
| Input Capacitance | 10 pF |
| Max Propagation Delay @ V, Max CL | 33 ns |
| Mounting Type | Through Hole |
| Number of Bits per Element | 4 |
| Number of Elements [custom] | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 C |
| Output Type | Complementary |
| Package / Case | 16-CDIP (0.300", 7.62mm) |
| Supplier Device Package | 16-CDIP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
CD54HCT175 Series
High Speed CMOS Logic Quad D-Type Flip-Flops with Reset
| Part | Current - Quiescent (Iq) | Supplier Device Package | Trigger Type | Number of Bits per Element | Mounting Type | Type | Max Propagation Delay @ V, Max CL | Number of Elements [custom] | Package / Case | Clock Frequency | Output Type | Input Capacitance | Operating Temperature [Min] | Operating Temperature [Max] | Voltage - Supply [Max] | Voltage - Supply [Min] | Current - Output High, Low |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD54HCT175F3AThe ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1.
The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1. | 8 ÁA | 16-CDIP | Positive Edge | 4 | Through Hole | D-Type | 33 ns | 1 | 16-CDIP (0.300", 7.62mm) | 25 MHz | Complementary | 10 pF | -55 C | 125 °C | 5.5 V | 4.5 V | 5.2 mA, 5.2 mA |
Description
General part information
CD54HCT175 Series
The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1.
The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
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