CD74HC175M96
ActiveHIGH SPEED CMOS LOGIC QUAD D-TYPE FLIP-FLOPS WITH RESET
Deep-Dive with AI
Search across all available documentation for this part.
CD74HC175M96
ActiveHIGH SPEED CMOS LOGIC QUAD D-TYPE FLIP-FLOPS WITH RESET
Deep-Dive with AI
Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | CD74HC175M96 | CD74HC175 Series |
|---|---|---|
| Clock Frequency | 35 MHz | 35 MHz |
| Current - Output High, Low | 5.2 mA, 5.2 mA | 5.2 mA |
| Current - Quiescent (Iq) | 8 ÁA | 8 ÁA |
| Input Capacitance | 10 pF | 10 pF |
| Mounting Type | Surface Mount | Surface Mount, Through Hole |
| Number of Bits per Element | 4 | 4 |
| Number of Elements [custom] | 1 | 1 |
| Operating Temperature [Max] | 125 °C | 125 °C |
| Operating Temperature [Min] | -55 C | -55 C |
| Output Type | Complementary | Complementary |
| Package / Case | 16-SOIC | 16-SOIC, 16-DIP |
| Package / Case | 3.9 mm Width, 0.154 in | 0.154 - 7.62 mm Width |
| Supplier Device Package | 16-SOIC | 16-SOIC, 16-PDIP |
| Trigger Type | Positive Edge | Positive Edge |
| Type | D-Type | D-Type |
| Voltage - Supply [Max] | 6 V | 6 V |
| Voltage - Supply [Min] | 2 V | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
CD74HC175 Series
High Speed CMOS Logic Quad D-Type Flip-Flops with Reset
| Part | Current - Output High, Low | Type | Trigger Type | Current - Quiescent (Iq) | Clock Frequency | Number of Bits per Element | Number of Elements [custom] | Package / Case | Package / Case | Operating Temperature [Min] | Operating Temperature [Max] | Mounting Type | Voltage - Supply [Min] | Voltage - Supply [Max] | Supplier Device Package | Input Capacitance | Output Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD74HC175M96The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1.
The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1. | 5.2 mA, 5.2 mA | D-Type | Positive Edge | 8 ÁA | 35 MHz | 4 | 1 | 16-SOIC | 0.154 in, 3.9 mm Width | -55 C | 125 °C | Surface Mount | 2 V | 6 V | 16-SOIC | 10 pF | Complementary |
Texas Instruments CD74HC175EThe ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1.
The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1. | 5.2 mA, 5.2 mA | D-Type | Positive Edge | 8 ÁA | 35 MHz | 4 | 1 | 16-DIP | 0.3 in, 7.62 mm | -55 C | 125 °C | Through Hole | 2 V | 6 V | 16-PDIP | 10 pF | Complementary |
Description
General part information
CD74HC175 Series
The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1.
The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.
Documents
Technical documentation and resources