TLV5619QDWREP
ActiveTexas Instruments
ENHANCED PRODUCT 12-BIT, SINGLE CHANNEL DAC, PARALLEL, VOLTAGE OUT, LOW POWER 20-SOIC -40 TO 125
Deep-Dive with AI
Search across all available documentation for this part.
TLV5619QDWREP
ActiveTexas Instruments
ENHANCED PRODUCT 12-BIT, SINGLE CHANNEL DAC, PARALLEL, VOLTAGE OUT, LOW POWER 20-SOIC -40 TO 125
Deep-Dive with AI
Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | TLV5619QDWREP | TLV5619 Series |
|---|---|---|
| Architecture | String DAC | String DAC |
| Data Interface | Parallel | Parallel |
| Differential Output | False | False |
| INL/DNL (LSB) [Max] | 1.5 LSB | 1.5 LSB |
| INL/DNL (LSB) [Min] | -1.5 LSB | -1.5 LSB |
| Mounting Type | Surface Mount | Surface Mount |
| Number of Bits | 12 | 12 |
| Operating Temperature [Max] | 125 °C | 70 - 125 °C |
| Operating Temperature [Min] | -40 °C | -40 - 0 °C |
| Output Type | Voltage - Buffered | Voltage - Buffered |
| Package / Case | 7.5 mm, 0.295 in | 0.173 - 7.5 mm |
| Package / Case | 20-SOIC | 20-SOIC, 20-TSSOP |
| Package / Case | - | 4.4 mm |
| Reference Type | External | External |
| Settling Time | 3 µs | 3 µs |
| Supplier Device Package | 20-SOIC | 20-SOIC, 20-TSSOP |
| Voltage - Supply, Analog | 5 V | 5 V |
| Voltage - Supply, Analog [Max] | 3.3 V | 3.3 V |
| Voltage - Supply, Analog [Min] | 2.7 V | 2.7 V |
| Voltage - Supply, Digital | 5 V | 5 V |
| Voltage - Supply, Digital [Max] | 3.3 V | 3.3 V |
| Voltage - Supply, Digital [Min] | 2.7 V | 2.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
TLV5619 Series
12-BIT, SINGLE CHANNEL DAC, PARALLEL, VOLTAGE OUT, LOW POWER, ASYNCHRONOUS UPDATE
| Part | Voltage - Supply, Analog [Max] | Voltage - Supply, Analog | Voltage - Supply, Analog [Min] | Output Type | Voltage - Supply, Digital | Voltage - Supply, Digital [Min] | Voltage - Supply, Digital [Max] | Number of Bits | Settling Time | Data Interface | Differential Output | Architecture | Reference Type | Supplier Device Package | INL/DNL (LSB) [Min] | INL/DNL (LSB) [Max] | Operating Temperature [Min] | Operating Temperature [Max] | Mounting Type | Package / Case | Package / Case | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments TLV5619IDWThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-SOIC | -1.5 LSB | 1.5 LSB | -40 °C | 85 °C | Surface Mount | 0.295 in, 7.5 mm | 20-SOIC | ||
Texas Instruments TLV5619CPWRThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-TSSOP | -1.5 LSB | 1.5 LSB | 0 °C | 70 ░C | Surface Mount | 0.173 in | 20-TSSOP | 4.4 mm | |
Texas Instruments TLV5619IDWRThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-SOIC | -1.5 LSB | 1.5 LSB | -40 °C | 85 °C | Surface Mount | 0.295 in, 7.5 mm | 20-SOIC | ||
Texas Instruments TLV5619IPWThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-TSSOP | -1.5 LSB | 1.5 LSB | -40 °C | 85 °C | Surface Mount | 0.173 in | 20-TSSOP | 4.4 mm | |
Texas Instruments TLV5619CDWThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-SOIC | -1.5 LSB | 1.5 LSB | 0 °C | 70 ░C | Surface Mount | 0.295 in, 7.5 mm | 20-SOIC | ||
Texas Instruments TLV5619CPWThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-TSSOP | -1.5 LSB | 1.5 LSB | 0 °C | 70 ░C | Surface Mount | 0.173 in | 20-TSSOP | 4.4 mm | |
Texas Instruments TLV5619QDWG4The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-SOIC | -1.5 LSB | 1.5 LSB | -40 °C | 125 °C | Surface Mount | 0.295 in, 7.5 mm | 20-SOIC | ||
Texas Instruments TLV5619IPWRThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-TSSOP | -1.5 LSB | 1.5 LSB | -40 °C | 85 °C | Surface Mount | 0.173 in | 20-TSSOP | 4.4 mm | |
Texas Instruments TLV5619CDWRThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-SOIC | -1.5 LSB | 1.5 LSB | 0 °C | 70 ░C | Surface Mount | 0.295 in, 7.5 mm | 20-SOIC | ||
Texas Instruments TLV5619QDWREPThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-SOIC | -1.5 LSB | 1.5 LSB | -40 °C | 125 °C | Surface Mount | 0.295 in, 7.5 mm | 20-SOIC | ||
Texas Instruments TLV5619IPWThe TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time. | 3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-TSSOP | -1.5 LSB | 1.5 LSB | -40 °C | 85 °C | Surface Mount | 0.173 in | 20-TSSOP | 4.4 mm | |
3.3 V | 5 V | 2.7 V | Voltage - Buffered | 5 V | 2.7 V | 3.3 V | 12 | 3 µs | Parallel | String DAC | External | 20-SOIC | -1.5 LSB | 1.5 LSB | -40 °C | 85 °C | Surface Mount | 0.295 in, 7.5 mm | 20-SOIC |
Description
General part information
TLV5619 Series
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
Documents
Technical documentation and resources