| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Timing logic memory | 10 | 1 | The MC10/100EP90 is a TRIPLE ECL TO LVPECL/PECL translator. The device receives differential LVECL or ECL signals and translates them to differential LVPECL or PECL output signals. A VBBoutput is provided for interfacing with single ended LVECL or ECL signals at the input. If a single ended input is to... Read More | |
ON Semiconductor100EP91 | Logic | 1 | 8 | |
| Logic/Translators, Level Shifters | 21 | 1 | The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline SOIC-8 package and the single gate of the EPT20 makes it ideal for those applications where space, performance, and low power are... Read More | |
| Logic ICs | 11 | 1 | The MC100EPT21 is a Differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL/LVDS/CML input levels and LVTTL/LVCMOS output levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal.The VBBoutput allows the... Read More | |
ON Semiconductor100EPT22 | Level Translators | 3 | 1 | |
| Translators / Level Shifters | 14 | 1 | The MC100EPT23 is a dual differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL/LVDS/CML input levels and LVTTL/LVCMOS output levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the EPT23 makes it ideal for applications which require the translation of... Read More | |
ON Semiconductor100EPT24 | Semiconductors - ICs | 13 | 1 | |
| Logic ICs | 7 | 1 | The MC100EPT25 is a Differential LVECL/ECL to LVTTL translator. This device requires +3.3V, -3.3V to -5.2V, and ground. The small outline 8-lead SOIC package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.The VBBoutput allows the EPT25... Read More | |
| Standard And Specialty Logic | 16 | 1 | The MC100EPT26 is a 1:2 Fanout Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the 1:2 fanout design of the EPT26 makes it ideal for applications which require the low skew duplication of... Read More | |
ON Semiconductor100EPT622 | Clock data distribution | 8 | 1 | |