CDx4HC73 CD74HCT73 Dual J-K Flip-Flop with Reset Negative-Edge Trigger datasheet (Rev. G)Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)CMOS Power Consumption and CPD Calculation (Rev. B)TI IBIS File Creation, Validation, and Distribution ProcessesSN54/74HCT CMOS Logic Family Applications and Restrictions

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