CDCUN1208LP Series
Ultra-low power, 2:8 fan-out buffer with universal inputs and outputs
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Ultra-low power, 2:8 fan-out buffer with universal inputs and outputs
| Part | Supplier Device Package | Input | Type | Operating Temperature [Min] | Operating Temperature [Max] | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Mounting Type | Package / Case | Number of Circuits | Output | Voltage - Supply [Min] | Voltage - Supply [Max] | Frequency - Max [Max] | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDCUN1208LPRHBR | 32-VQFN (5x5) | HCSL, LVCMOS, LVDS | Divider, Fanout Buffer (Distribution), Multiplexer | -40 °C | 85 °C | Surface Mount | 32-VFQFN Exposed Pad | 1 | HCSL, LVCMOS, LVDS | 1.7 V | 3.63 V | 400 MHz | 2 | 8 | ||
Texas Instruments CDCUN1208LPRHBT | 32-VQFN (5x5) | HCSL, LVCMOS, LVDS | Divider, Fanout Buffer (Distribution), Multiplexer | -40 °C | 85 °C | Surface Mount | 32-VFQFN Exposed Pad | 1 | HCSL, LVCMOS, LVDS | 1.7 V | 3.63 V | 400 MHz | 2 | 8 |
Key Features
• Supports PCIe Gen1, Gen2, Gen3Configuration Options (Through Pins or SPI/I2C):Input Type (HCSL, LVDS, LVCMOS)Output Type (HCSL, LVDS, LVCMOS)Signal Edge Rate (Slow, Medium, Fast)Clock Input Divide Value (/1, /2, /4, /8) – IN2 OnlyLow-Power Consumption and Power Management Features, Including 1.8-V Operation and Output Enable ControlIntegrated Voltage Regulators to Improve PSNRExcellent Additive Jitter Performance200 fs RMS (10 kHz to 20 MHz), LVDS at100 MHz160 fs RMS (10 kHz to 20 MHz), HCSL at100 MHzMaximum Operating Frequency:Differential Mode: up to 400 MHzLVCMOS Mode: up to 250 MHzESD Protection Exceeds 2-kV HBM, 500-V CDMIndustrial Temperature Range (–40°C to 85°C)Wide Supply Range (1.8 V, 2.5 V, or 3.3 V)Supports PCIe Gen1, Gen2, Gen3Configuration Options (Through Pins or SPI/I2C):Input Type (HCSL, LVDS, LVCMOS)Output Type (HCSL, LVDS, LVCMOS)Signal Edge Rate (Slow, Medium, Fast)Clock Input Divide Value (/1, /2, /4, /8) – IN2 OnlyLow-Power Consumption and Power Management Features, Including 1.8-V Operation and Output Enable ControlIntegrated Voltage Regulators to Improve PSNRExcellent Additive Jitter Performance200 fs RMS (10 kHz to 20 MHz), LVDS at100 MHz160 fs RMS (10 kHz to 20 MHz), HCSL at100 MHzMaximum Operating Frequency:Differential Mode: up to 400 MHzLVCMOS Mode: up to 250 MHzESD Protection Exceeds 2-kV HBM, 500-V CDMIndustrial Temperature Range (–40°C to 85°C)Wide Supply Range (1.8 V, 2.5 V, or 3.3 V)
Description
AI
The CDCUN1208LP is a 2:8 fan-out buffer featuring a wide operating supply range, two universal differential/single-ended inputs, and universal outputs (HCSL, LVDS, or LVCMOS) with edge-rate control. The clock buffer supports PCIe Gen1, Gen2 and Gen3. One of the device inputs includes a divider that provides divide values of /1, /2, /4, or /8. The CDCUN1208LP is offered in a 32-pin QFN package, reducing the solution footprint. The device is flexible and easy to use. The state of certain pins determines device configuration at power up. Alternately, the CDCUN1208LP provides a SPI/I2C port with which a host processor controls device settings. The CDCUN1208LP delivers excellent additive jitter performance, and low power consumption. The output section includes four dedicated supply pins enabling the operation of output ports from different power supply domains. This provides the ability to clock devices switching at different LVCMOS levels without the need for external logic level translation circuitry.
The CDCUN1208LP is a 2:8 fan-out buffer featuring a wide operating supply range, two universal differential/single-ended inputs, and universal outputs (HCSL, LVDS, or LVCMOS) with edge-rate control. The clock buffer supports PCIe Gen1, Gen2 and Gen3. One of the device inputs includes a divider that provides divide values of /1, /2, /4, or /8. The CDCUN1208LP is offered in a 32-pin QFN package, reducing the solution footprint. The device is flexible and easy to use. The state of certain pins determines device configuration at power up. Alternately, the CDCUN1208LP provides a SPI/I2C port with which a host processor controls device settings. The CDCUN1208LP delivers excellent additive jitter performance, and low power consumption. The output section includes four dedicated supply pins enabling the operation of output ports from different power supply domains. This provides the ability to clock devices switching at different LVCMOS levels without the need for external logic level translation circuitry.