CD54HCT112 Series
High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger
Manufacturer: Texas Instruments
Catalog
High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger
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High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger
High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger
High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger
| Part | Output Type | Current - Quiescent (Iq) | Mounting Type | Function | Operating Temperature (Max) | Operating Temperature (Min) | Package Width | Package Name | Package Length | Type | Current - Output Low | Current - Output High | Number of Elements | Max CL | Max Propagation Delay | Voltage - Supply (Maximum) | Voltage - Supply (Minimum) | Number of Bits per Element | Clock Frequency | Trigger Type | Input Capacitance |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
 Texas Instruments | Complementary | 4 µA | Through Hole | Set(Preset) and Reset | 125 °C | -55 °C | 7.62 mm | 16-CDIP | 0.3 in | JK Type | 4 mA | 4 mA | 2 | 50 pF | 35 ns | 5.5 V | 4.5 V | 1 bits | 60 MHz | Negative Edge | 10 pF |