74FCT574 Series
Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
Manufacturer: Texas Instruments
Catalog(7 parts)
| Part | Input Capacitance▲▼ | Function | Max Propagation Delay @ V, Max CL▲▼ | Current - Quiescent (Iq)▲▼ | Output Type | Package / Case▲▼ | Package / Case | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Supplier Device Package | Number of Bits per Element▲▼ | Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Number of Elements▲▼ | Mounting Type | Trigger Type | Current - Output High, Low▲▼ | Package / Case▲▼ | Max Propagation Delay @ V, Max CL▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CY74FCT574CTSOCTFlip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width) | 4.999999980020986e-12 F | Standard | 5.199999986160719e-9 s | 0.00019999999494757503 A | Tri-State, Non-Inverted | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | 4.75 V | 5.25 V | 20-SOIC | 8 ul | D-Type | 85 °C | -40 °C | 1 ul | Surface Mount | Positive Edge | 0.03200000151991844 A, 0.06400000303983688 A | ||
Texas Instruments CY74FCT574TQCTG4Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SSOP (0.154", 3.90mm Width) | 4.999999980020986e-12 F | Standard | 9.99999993922529e-9 s | 0.00019999999494757503 A | Tri-State, Non-Inverted | 0.003911599982529879 m | 20-SSOP | 4.75 V | 5.25 V | 20-SSOP | 8 ul | D-Type | 85 °C | -40 °C | 1 ul | Surface Mount | Positive Edge | 0.03200000151991844 A, 0.06400000303983688 A | 0.003899999894201755 m | |
Texas Instruments CY74FCT574TSOCTG4Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width) | 4.999999980020986e-12 F | Standard | 9.99999993922529e-9 s | 0.00019999999494757503 A | Tri-State, Non-Inverted | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | 4.75 V | 5.25 V | 20-SOIC | 8 ul | D-Type | 85 °C | -40 °C | 1 ul | Surface Mount | Positive Edge | 0.03200000151991844 A, 0.06400000303983688 A | ||
Texas Instruments CY74FCT574CTSOCFlip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width) | 4.999999980020986e-12 F | Standard | 5.199999986160719e-9 s | 0.00019999999494757503 A | Tri-State, Non-Inverted | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | 4.75 V | 5.25 V | 20-SOIC | 8 ul | D-Type | 85 °C | -40 °C | 1 ul | Surface Mount | Positive Edge | 0.03200000151991844 A, 0.06400000303983688 A | ||
Texas Instruments CY74FCT574TSOCTFlip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width) | 4.999999980020986e-12 F | Standard | 9.99999993922529e-9 s | 0.00019999999494757503 A | Tri-State, Non-Inverted | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | 4.75 V | 5.25 V | 20-SOIC | 8 ul | D-Type | 85 °C | -40 °C | 1 ul | Surface Mount | Positive Edge | 0.03200000151991844 A, 0.06400000303983688 A | ||
Texas Instruments CY74FCT574ATSOCTFlip Flop 1 Element D-Type 8 Bit Positive Edge 20-SOIC (0.295", 7.50mm Width) | 4.999999980020986e-12 F | Standard | 0.00019999999494757503 A | Tri-State, Non-Inverted | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | 4.75 V | 5.25 V | 20-SOIC | 8 ul | D-Type | 85 °C | -40 °C | 1 ul | Surface Mount | Positive Edge | 0.03200000151991844 A, 0.06400000303983688 A | 6.5000000937232025e-9 s | ||
Key Features
• Function, Pinout, and Drive Compatible With FCT and F LogicReduced VOH(Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationMatched Rise and Fall TimesFully Compatible With TTL Input and Output Logic LevelsESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Edge-Triggered D-Type Inputs250-MHz Typical Switching RateCY54FCT574T32-mA Output Sink Current12-mA Output Source CurrentCY74FCT574T64-mA Output Sink Current32-mA Output Source Current3-State OutputsFunction, Pinout, and Drive Compatible With FCT and F LogicReduced VOH(Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationMatched Rise and Fall TimesFully Compatible With TTL Input and Output Logic LevelsESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Edge-Triggered D-Type Inputs250-MHz Typical Switching RateCY54FCT574T32-mA Output Sink Current12-mA Output Source CurrentCY74FCT574T64-mA Output Sink Current32-mA Output Source Current3-State Outputs
Description
AI
The \x92FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE\) inputs are common to all flip-flops. The \x92FCT574T are identical to \x92FCT374T, except for a flow-through pinout to simplify board design. The eight flip-flops in the \x92FCT574T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in the high-impedance state. The state of OE\ does not affect the state of the flip-flops.
These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The \x92FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE\) inputs are common to all flip-flops. The \x92FCT574T are identical to \x92FCT374T, except for a flow-through pinout to simplify board design. The eight flip-flops in the \x92FCT574T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in the high-impedance state. The state of OE\ does not affect the state of the flip-flops.
These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.