Catalog(1 parts)
| Part | Direction | Reset | Count Rate▲▼ | Mounting Type | Number of Bits per Element▲▼ | Trigger Type | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Logic Type | Supplier Device Package | Package / Case | Package / Case▲▼ | Timing | Number of Elements▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Up | Asynchronous | 25000000 Hz | Surface Mount | 4 ul | Negative, Positive | 5.5 V | 4.5 V | Binary Counter | 16-SOIC | 16-SOIC | 0.003911599982529879 m, 3.900000095367432 ul | Synchronous | 2 ul | -55 °C | 125 °C |
Key Features
• Positive or Negative Edge TriggeringSynchronous Internal Carry PropagationFanout (Over Temperature Range)Standard Outputs...10 LSTTL LoadsBus Driver Outputs...15 LSTTL LoadsWide Operating Temperature Range... –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOHPositive or Negative Edge TriggeringSynchronous Internal Carry PropagationFanout (Over Temperature Range)Standard Outputs...10 LSTTL LoadsBus Driver Outputs...15 LSTTL LoadsWide Operating Temperature Range... –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOH
Description
AI
The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.
The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each device consists of two independent internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or the negative-going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be cascaded in the ripple mode by connecting Q3to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low.