74LVC1G132 Series

Single 2-input, 1.65-V to 5.5-V NAND gate with Schmitt-Trigger inputs

Catalog(5 parts)

Part	Max Propagation Delay @ V, Max CL▲▼	Supplier Device Package	Features	Input Logic Level - Low▲▼	Input Logic Level - Low▲▼	Input Logic Level - High▲▼	Input Logic Level - High▲▼	Mounting Type	Number of Inputs▲▼	Current - Output High, Low▲▼	Current - Output High, Low▲▼	Voltage - Supply▲▼	Voltage - Supply▲▼	Logic Type	Package / Case	Operating Temperature▲▼	Operating Temperature▲▼	Current - Quiescent (Max)▲▼	Number of Circuits▲▼
Texas Instruments 74LVC1G132DCKRG4 NAND Gate IC 1 Channel Schmitt Trigger SC-70-5	4.999999969612645e-9 s	SC-70-5	Schmitt Trigger	1.8700000047683716 V	0.38999998569488525 V	1.159999966621399 V	3.3299999237060547 V	Surface Mount	2 ul	0.03200000151991844 A	0.03200000151991844 A	5.5 V	1.649999976158142 V	NAND Gate	5-TSSOP, SC-70-5, SOT-353	125 °C	-40 °C	0.000009999999747378752 A	1 ul
Texas Instruments SN74LVC1G132YZPR NAND Gate IC 1 Channel Schmitt Trigger 5-DSBGA (1.4x0.9)	4.999999969612645e-9 s	5-DSBGA (1.4x0.9)	Schmitt Trigger	1.8700000047683716 V	0.38999998569488525 V	1.159999966621399 V	3.3299999237060547 V	Surface Mount	2 ul	0.03200000151991844 A	0.03200000151991844 A	5.5 V	1.649999976158142 V	NAND Gate	5-XFBGA, DSBGA	85 °C	-40 °C	0.000009999999747378752 A	1 ul
Texas Instruments 74LVC1G132DBVTG4 NAND Gate IC 1 Channel Schmitt Trigger SOT-23-5	4.999999969612645e-9 s	SOT-23-5	Schmitt Trigger	1.8700000047683716 V	0.38999998569488525 V	1.159999966621399 V	3.3299999237060547 V	Surface Mount	2 ul	0.03200000151991844 A	0.03200000151991844 A	5.5 V	1.649999976158142 V	NAND Gate	SC-74A, SOT-753	125 °C	-40 °C	0.000009999999747378752 A	1 ul
Texas Instruments 74LVC1G132DCKTG4 NAND Gate IC 1 Channel Schmitt Trigger SC-70-5	4.999999969612645e-9 s	SC-70-5	Schmitt Trigger	1.8700000047683716 V	0.38999998569488525 V	1.159999966621399 V	3.3299999237060547 V	Surface Mount	2 ul	0.03200000151991844 A	0.03200000151991844 A	5.5 V	1.649999976158142 V	NAND Gate	5-TSSOP, SC-70-5, SOT-353	125 °C	-40 °C	0.000009999999747378752 A	1 ul
Texas Instruments SN74LVC1G132DCKR NAND Gate IC 1 Channel Schmitt Trigger SC-70-5	4.999999969612645e-9 s	SC-70-5	Schmitt Trigger	1.8700000047683716 V	0.38999998569488525 V	1.159999966621399 V	3.3299999237060547 V	Surface Mount	2 ul	0.03200000151991844 A	0.03200000151991844 A	5.5 V	1.649999976158142 V	NAND Gate	5-TSSOP, SC-70-5, SOT-353	125 °C	-40 °C	0.000009999999747378752 A	1 ul

Key Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Available in Texas InstrumentsNanoStar™ and NanoFree™ PackagesSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 5.3 ns at 3.3 VLow Power Consumption, 10-µA Maximum ICC±24-mA Output Drive at 3.3 VIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Available in Texas InstrumentsNanoStar™ and NanoFree™ PackagesSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 5.3 ns at 3.3 VLow Power Consumption, 10-µA Maximum ICC±24-mA Output Drive at 3.3 VIoffSupports Partial-Power-Down Mode Operation

Description

The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCCoperation and performs the Boolean function Y =A × Bor Y =A+Bin positive logic. Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCCoperation and performs the Boolean function Y =A × Bor Y =A+Bin positive logic. Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.