Catalog
SONET/SDH Line Card System Synchronizer
Key Features
• * Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-1244-CORE, GR-253-CORE, ITU-T G.813, and compatible with ITU-T G.8261 (formerly G.pactiming)
• * Internal low jitter APLL provides SONET/SDH clocks including 6.48 MHz, 19.44 MHz, 38.88 MHz, 51.84 MHz and 77.76 MHz, or 25 MHz and 50 MHz Synchronous Ethernet output clocks
• * Provides two DPLLs which have independent modes of operation (locked, free-run, holdover) and optional hitless reference switching
• * Programmable output synthesizers (P0, P1) generate general purpose clock frequencies from any multiple of 8 kHz up to 100 MHz
• * Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to 77.76 MHz in addition to 2 kHz
• * Generates several styles of output frame pulses with selectable pulse width, polarity, and frequency
• * Configurable input to output delay, and output to output phase alignment
• * Typical Applications
•
• + AMCs for AdvancedTCATMand MicroTCA
• + Systems
• + Synchronous Ethernet
• + Multi-Service Edge Switches or Routers
• + DSLAM Line Cards
• + WAN Line Cards RNC/Mobile Switching Center Line Cards
• + ADM Line Cards
Description
AI
The ZL30120 Multi-Rate Line Card Synchronizer is a highly integrated device that provides timing and synchronization for network interface cards. It incorporates two independent DPLLs, each capable of locking to one of eight input references and provides a wide variety of synchronized output clocks and frame pulses.
**[Click here for secure documentation](https://www.microsemi.com/product-directory/cgcd-mature/4715-zl30120#resources)**