AM623 Series
Internet of Things (IoT) and gateway SoC with Arm® Cortex®-A53-based object and gesture recognition
Manufacturer: Texas Instruments
Catalog
Internet of Things (IoT) and gateway SoC with Arm® Cortex®-A53-based object and gesture recognition
| Part | Co-Processors/DSP | Speed | Number of Cores/Bus Width [custom] | Number of Cores/Bus Width [custom] | Core Processor | Operating Temperature [custom] | Supplier Device Package | Display & Interface Controllers | Ethernet | Ethernet | USB | Mounting Type | Package / Case | Voltage - I/O | RAM Controllers | Security Features | Graphics Acceleration | Additional Interfaces | Number of Cores/Bus Width | Grade | Qualification |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments AM6231ATGGHAALWR | ARM® Cortex®-M4F | 1.4 GHz | 1 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | ||||
Texas Instruments AM6232ATCGHAALW | ARM® Cortex®-M4F | 1.4 GHz | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | 2 Core, 64 Bit | |||||
Texas Instruments AM6231ATCGHAALW | ARM® Cortex®-M4F | 1.4 GHz | 1 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | ||||
Texas Instruments AM6231ASGGHAALW | ARM® Cortex®-M4F | 1 GHz | 1 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | ||||
Texas Instruments AM6232ASCGHAALWR | ARM® Cortex®-M4F | 1 GHz | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | 2 Core, 64 Bit | |||||
Texas Instruments AM6231ASGGGAALW | ARM® Cortex®-M4F | 1 GHz | 1 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS | 10/100 Mbps (2), 10/100/1000 Mbps (2) | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, MMC/SD, QSPI, SPI, TDM, UART/USART | |||||
Texas Instruments AM6234ASCGHAALWR | ARM® Cortex®-M4F | 1 GHz | 4 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | ||||
Texas Instruments AM6234ATCGHAALW | ARM® Cortex®-M4F | 1.4 GHz | 4 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | ||||
Texas Instruments AM6232ASGGHAALW | ARM® Cortex®-M4F | 1 GHz | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | 2 Core, 64 Bit | |||||
Texas Instruments AM6232ATGGHAALWR | ARM® Cortex®-M4F | 1.4 GHz | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | 2 Core, 64 Bit | |||||
Texas Instruments AM6234ATGGHAALW | ARM® Cortex®-M4F | 1.4 GHz | 4 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | ||||
Texas Instruments AM6232ATCGGAALW | ARM® Cortex®-M4F | 1.4 GHz | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS | 10/100 Mbps (2), 10/100/1000 Mbps (2) | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | 2 Core, 64 Bit | Automotive | AEC-Q100 | ||||
Texas Instruments AM6234ASGGHAALWR | ARM® Cortex®-M4F | 1 GHz | 4 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS, MIPI-DPI, MIPI/CSI, OLDI | 10 Mbps, 100 Mbps, 1000 Mbps | 2 | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, I2S, MMC/SD, QSPI, SPDIF, SPI, TDM, UART/USART | ||||
Texas Instruments AM6234ATCGGAALW | ARM® Cortex®-M4F | 1.4 GHz | 4 | 64 Bit | ARM® Cortex®-A53 | -40 °C, 105 °C | 425-FCCSP (13x13) | LVDS | 10/100 Mbps (2), 10/100/1000 Mbps (2) | USB 2.0 (2) | Surface Mount | 425-VFBGA, FCCSPBGA | 1.1 V, 1.2 V, 1.8 V, 3.3 V | DDR4, LPDDR4 | AES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMS | DMA, GPIO, I2C, MMC/SD, QSPI, SPI, TDM, UART/USART |
Key Features
• Processor Cores:Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4 GHzQuad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECCEach A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protectionSingle-core Arm® Cortex®-M4F MCU at up to 400 MHz256KB SRAM with SECDED ECCDedicated Device/Power ManagerMultimedia:Display subsystemDual display support1920x1080 @ 60fps for each display1x 2048x1080 + 1x 1280x720Up to 165 MHz pixel clock support with Independent PLL for each displayOLDI (4 lanes LVDS - 2x) and DPI (24-bit RGB LVCMOS)Support safety feature such as freeze frame detection and MISR data check3D Graphics Processing Unit1 pixel per clock or higherFillrate greater than 500 Mpixels/sec>500 MTexels/s, >8 GFLOPsSupports at least 2 composition layersSupports up to 2048x1080 @60fpsSupports ARGB32, RGB565 and YUV formats2D graphics capableOpenGL ES 3.1, Vulkan 1.2One Camera Serial interface (CSI-Rx) - 4 Lane with DPHYMIPI CSI-2 v1.3 Compliant + MIPI D-PHY 1.2Support for 1,2,3 or 4 data lane mode up to 1.5GbpsECC verification/correction with CRC check + ECC on RAMVirtual Channel support (up to 16)Ability to write stream data directly to DDR via DMAMemory Subsystem:Up to 816KB of On-chip RAM64KB of On-chip RAM (OCSRAM) with SECDED ECC , Can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks256KB of On-chip RAM with SECDED ECC in SMS Subsystem176KB of On-chip RAM with SECDED ECC in SMS Subsystem for TI security firmware256KB of On-chip RAM with SECDED ECC in Cortex-M4F MCU subsystem64KB of On-chip RAM with SECDED ECC in Device/Power Manager SubsystemDDR Subsystem (DDRSS)Supports LPDDR4, DDR4 memory types16-Bit data bus with inline ECCSupports speeds up to 1600 MT/sMax addressable range8GBytes with DDR44GBytes with LPDDR4Functional Safety:Functional Safety-Complianttargeted [Industrial]Developed for functional safety applicationsDocumentation will be available to aid IEC 61508 functional safety system designSystematic capability up to SIL 3 targetedHardware Integrity up to SIL 2 targetedSafety-related certificationIEC 61508 by TUV SUD plannedFunctional Safety-Complianttargeted [Automotive]Developed for functional safety applicationsDocumentation will be available to aid ISO 26262 functional safety system designSystematic capability up to ASIL D targetedHardware integrity up to ASIL B targetedSafety-related certificationISO 26262 by TUV SUD plannedAEC - Q100 qualifiedSecurity:Secure boot supportedHardware-enforced Root-of-Trust (RoT)Support to switch RoT via backup keySupport for takeover protection, IP protection, and anti-roll back protectionTrusted Execution Environment (TEE) supportedArm TrustZone based TEEExtensive firewall support for isolationSecure watchdog/timer/IPCSecure storage supportReplay Protected Memory Block (RPMB) supportDedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processingCryptographic acceleration supportedSession-aware cryptographic engine with ability to auto-switch key-material based on incoming data streamSupports cryptographic coresAES – 128-/192-/256-Bit key sizesSHA2 – 224-/256-/384-/512-Bit key sizesDRBG with true random number generatorPKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure bootDebugging securitySecure software controlled debug accessSecurity aware debuggingPRU Subsystem:Dual-core Programmable Real-Time Unit Subystem (PRUSS) running up to 333 MHzIntended for driving GPIO for cycle accurate protocols such as additional:General Purpose Input/Output (GPIO)UARTsI 2CExternal ADC16KByte program memory per PRU with SECDED ECC8KB data memory per PRU with SECDED ECC32KB general purpose memory with SECDED ECCCRC32/16 HW acceleratorScratch PAD memory with 3 banks of 30 x 32-bit registers1 Industrial 64-bit timer with 9 capture and 16 compare events, along with slow and fast compensation1 interrupt controller (INTC), minimum of 64 input events supportedHigh-Speed Interfaces:Integrated Ethernet switch supporting (total 2 external ports)RMII(10/100) or RGMII (10/100/1000)IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)Clause 45 MDIO PHY managementPacket Classifier based on ALE engine with 512 classifiersPriority based flow controlTime sensitive networking (TSN) supportFour CPU H/W interrupt PacingIP/UDP/TCP checksum offload in hardwareTwo USB2.0 PortsPort configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)Integrated USB VBUS detectionTrace over USB supportedGeneral Connectivity:9x Universal Asynchronous Receiver-Transmitters (UART)5x Serial Peripheral Interface (SPI) controllers6x Inter-Integrated Circuit (I 2C) ports3x Multichannel Audio Serial Ports (McASP)Transmit and Receive Clocks up to 50 MHzUp to 16/10/6 Serial Data Pins across 3x McASP with Independent TX and RX ClocksSupports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar FormatsSupports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)FIFO Buffers for Transmit and Receive (256 Bytes)Support for audio reference output clock3x enhanced PWM modules (ePWM)3x enhanced Quadrature Encoder Pulse modules (eQEP)3x enhanced Capture modules (eCAP)General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO3x Controller Area Network (CAN) modules with CAN-FD supportConforms w/ CAN Protocol 2.0 A, B and ISO 11898-1Full CAN FD support (up to 64 data bytes)Parity/ECC check for Message RAMSpeed up to 8MbpsMedia and Data Storage:3x Multi-Media Card/Secure Digital (MMC/SD) interface1x 8-bit eMMC interface up to HS200 speed2x 4-bit SD/SDIO interface up to UHS-ICompliant with eMMC 5.1, SD 3.0 and SDIO Version 3.01× General-Purpose Memory Controller (GPMC) up to 133 MHzFlexible 8- and 16-Bit Asynchronous Memory Interface With up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)Uses BCH Code to Support 4-, 8-, or 16-Bit ECCUses Hamming Code to Support 1-Bit ECCError Locator Module (ELM)Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH AlgorithmSupports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH AlgorithmsOSPI/QSPI with DDR / SDR supportSupport for Serial NAND and Serial NOR flash devices4GBytes memory address supportXIP mode with optional on-the-fly encryptionPower Management:Low power modes supported by Device/Power ManagerPartial IO support for CAN/GPIO/UART wakeupDeepSleepMCU OnlyStandbyDynamic frequency scaling for Cortex-A53Optimal Power Management Solution:RecommendedTPS65219Power Management ICs (PMIC)Companion PMIC specially designed to meet device power supply requirementsFlexible mapping and factory programmed configurations to support different use casesBoot Options:UARTI 2C EEPROMOSPI/QSPI FlashGPMC NOR/NAND FlashSerial NAND FlashSD CardeMMCUSB (host) boot from Mass Storage deviceUSB (device) boot from external host (DFU mode)EthernetTechnology / Package:16-nm technology13 mm x 13 mm, 0.5-mm pitch, 425-pin FCCSP BGA (ALW)17.2 mm x 17.2 mm, 0.8-mm pitch, 441-pin FCBGA (AMC)Processor Cores:Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4 GHzQuad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECCEach A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protectionSingle-core Arm® Cortex®-M4F MCU at up to 400 MHz256KB SRAM with SECDED ECCDedicated Device/Power ManagerMultimedia:Display subsystemDual display support1920x1080 @ 60fps for each display1x 2048x1080 + 1x 1280x720Up to 165 MHz pixel clock support with Independent PLL for each displayOLDI (4 lanes LVDS - 2x) and DPI (24-bit RGB LVCMOS)Support safety feature such as freeze frame detection and MISR data check3D Graphics Processing Unit1 pixel per clock or higherFillrate greater than 500 Mpixels/sec>500 MTexels/s, >8 GFLOPsSupports at least 2 composition layersSupports up to 2048x1080 @60fpsSupports ARGB32, RGB565 and YUV formats2D graphics capableOpenGL ES 3.1, Vulkan 1.2One Camera Serial interface (CSI-Rx) - 4 Lane with DPHYMIPI CSI-2 v1.3 Compliant + MIPI D-PHY 1.2Support for 1,2,3 or 4 data lane mode up to 1.5GbpsECC verification/correction with CRC check + ECC on RAMVirtual Channel support (up to 16)Ability to write stream data directly to DDR via DMAMemory Subsystem:Up to 816KB of On-chip RAM64KB of On-chip RAM (OCSRAM) with SECDED ECC , Can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks256KB of On-chip RAM with SECDED ECC in SMS Subsystem176KB of On-chip RAM with SECDED ECC in SMS Subsystem for TI security firmware256KB of On-chip RAM with SECDED ECC in Cortex-M4F MCU subsystem64KB of On-chip RAM with SECDED ECC in Device/Power Manager SubsystemDDR Subsystem (DDRSS)Supports LPDDR4, DDR4 memory types16-Bit data bus with inline ECCSupports speeds up to 1600 MT/sMax addressable range8GBytes with DDR44GBytes with LPDDR4Functional Safety:Functional Safety-Complianttargeted [Industrial]Developed for functional safety applicationsDocumentation will be available to aid IEC 61508 functional safety system designSystematic capability up to SIL 3 targetedHardware Integrity up to SIL 2 targetedSafety-related certificationIEC 61508 by TUV SUD plannedFunctional Safety-Complianttargeted [Automotive]Developed for functional safety applicationsDocumentation will be available to aid ISO 26262 functional safety system designSystematic capability up to ASIL D targetedHardware integrity up to ASIL B targetedSafety-related certificationISO 26262 by TUV SUD plannedAEC - Q100 qualifiedSecurity:Secure boot supportedHardware-enforced Root-of-Trust (RoT)Support to switch RoT via backup keySupport for takeover protection, IP protection, and anti-roll back protectionTrusted Execution Environment (TEE) supportedArm TrustZone based TEEExtensive firewall support for isolationSecure watchdog/timer/IPCSecure storage supportReplay Protected Memory Block (RPMB) supportDedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processingCryptographic acceleration supportedSession-aware cryptographic engine with ability to auto-switch key-material based on incoming data streamSupports cryptographic coresAES – 128-/192-/256-Bit key sizesSHA2 – 224-/256-/384-/512-Bit key sizesDRBG with true random number generatorPKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure bootDebugging securitySecure software controlled debug accessSecurity aware debuggingPRU Subsystem:Dual-core Programmable Real-Time Unit Subystem (PRUSS) running up to 333 MHzIntended for driving GPIO for cycle accurate protocols such as additional:General Purpose Input/Output (GPIO)UARTsI 2CExternal ADC16KByte program memory per PRU with SECDED ECC8KB data memory per PRU with SECDED ECC32KB general purpose memory with SECDED ECCCRC32/16 HW acceleratorScratch PAD memory with 3 banks of 30 x 32-bit registers1 Industrial 64-bit timer with 9 capture and 16 compare events, along with slow and fast compensation1 interrupt controller (INTC), minimum of 64 input events supportedHigh-Speed Interfaces:Integrated Ethernet switch supporting (total 2 external ports)RMII(10/100) or RGMII (10/100/1000)IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)Clause 45 MDIO PHY managementPacket Classifier based on ALE engine with 512 classifiersPriority based flow controlTime sensitive networking (TSN) supportFour CPU H/W interrupt PacingIP/UDP/TCP checksum offload in hardwareTwo USB2.0 PortsPort configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)Integrated USB VBUS detectionTrace over USB supportedGeneral Connectivity:9x Universal Asynchronous Receiver-Transmitters (UART)5x Serial Peripheral Interface (SPI) controllers6x Inter-Integrated Circuit (I 2C) ports3x Multichannel Audio Serial Ports (McASP)Transmit and Receive Clocks up to 50 MHzUp to 16/10/6 Serial Data Pins across 3x McASP with Independent TX and RX ClocksSupports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar FormatsSupports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)FIFO Buffers for Transmit and Receive (256 Bytes)Support for audio reference output clock3x enhanced PWM modules (ePWM)3x enhanced Quadrature Encoder Pulse modules (eQEP)3x enhanced Capture modules (eCAP)General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO3x Controller Area Network (CAN) modules with CAN-FD supportConforms w/ CAN Protocol 2.0 A, B and ISO 11898-1Full CAN FD support (up to 64 data bytes)Parity/ECC check for Message RAMSpeed up to 8MbpsMedia and Data Storage:3x Multi-Media Card/Secure Digital (MMC/SD) interface1x 8-bit eMMC interface up to HS200 speed2x 4-bit SD/SDIO interface up to UHS-ICompliant with eMMC 5.1, SD 3.0 and SDIO Version 3.01× General-Purpose Memory Controller (GPMC) up to 133 MHzFlexible 8- and 16-Bit Asynchronous Memory Interface With up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)Uses BCH Code to Support 4-, 8-, or 16-Bit ECCUses Hamming Code to Support 1-Bit ECCError Locator Module (ELM)Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH AlgorithmSupports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH AlgorithmsOSPI/QSPI with DDR / SDR supportSupport for Serial NAND and Serial NOR flash devices4GBytes memory address supportXIP mode with optional on-the-fly encryptionPower Management:Low power modes supported by Device/Power ManagerPartial IO support for CAN/GPIO/UART wakeupDeepSleepMCU OnlyStandbyDynamic frequency scaling for Cortex-A53Optimal Power Management Solution:RecommendedTPS65219Power Management ICs (PMIC)Companion PMIC specially designed to meet device power supply requirementsFlexible mapping and factory programmed configurations to support different use casesBoot Options:UARTI 2C EEPROMOSPI/QSPI FlashGPMC NOR/NAND FlashSerial NAND FlashSD CardeMMCUSB (host) boot from Mass Storage deviceUSB (device) boot from external host (DFU mode)EthernetTechnology / Package:16-nm technology13 mm x 13 mm, 0.5-mm pitch, 425-pin FCCSP BGA (ALW)17.2 mm x 17.2 mm, 0.8-mm pitch, 441-pin FCBGA (AMC)
Description
AI
The low-cost AM62x Sitara™ MPU family of application processors are built for Linux® application development. With scalable Arm® Cortex®-A53 performance and embedded features, such as: dual-display support and 3D graphics acceleration, along with an extensive set of peripherals that make the AM62x device well-suited for a broad range of industrial and automotive applications while offering intelligent features and optimized power architecture as well.
Some of these applications include:
AM62x Sitara™ processors are industrial-grade in the 13 x 13 mm package (ALW) and can meet the AEC - Q100 automotive standard in the 17.2 x 17.2 mm package (AMC). Industrial and Automotive functional safety requirements can be addressed using the integrated Cortex-M4F cores and dedicated peripherals, which can all be isolated from the rest of the AM62x processor.
The 3-port Gigabit Ethernet switch has one internal port and two external ports with Time-Sensitive Networking (TSN) support. An additional PRU module on the device enables real-time I/O capability for customer’s own use cases. In addition, the extensive set of peripherals included in AM62x enables system-level connectivity, such as: USB, MMC/SD, Camera interface, OSPI, CAN-FD and GPMC for parallel host interface to an external ASIC/FPGA. The AM62x device also supports secure boot for IP protection with the built-in Hardware Security Module (HSM) and employs advanced power management support for portable and power-sensitive applications
Products in the AM62x processor family:
The low-cost AM62x Sitara™ MPU family of application processors are built for Linux® application development. With scalable Arm® Cortex®-A53 performance and embedded features, such as: dual-display support and 3D graphics acceleration, along with an extensive set of peripherals that make the AM62x device well-suited for a broad range of industrial and automotive applications while offering intelligent features and optimized power architecture as well.
Some of these applications include:
AM62x Sitara™ processors are industrial-grade in the 13 x 13 mm package (ALW) and can meet the AEC - Q100 automotive standard in the 17.2 x 17.2 mm package (AMC). Industrial and Automotive functional safety requirements can be addressed using the integrated Cortex-M4F cores and dedicated peripherals, which can all be isolated from the rest of the AM62x processor.
The 3-port Gigabit Ethernet switch has one internal port and two external ports with Time-Sensitive Networking (TSN) support. An additional PRU module on the device enables real-time I/O capability for customer’s own use cases. In addition, the extensive set of peripherals included in AM62x enables system-level connectivity, such as: USB, MMC/SD, Camera interface, OSPI, CAN-FD and GPMC for parallel host interface to an external ASIC/FPGA. The AM62x device also supports secure boot for IP protection with the built-in Hardware Security Module (HSM) and employs advanced power management support for portable and power-sensitive applications
Products in the AM62x processor family: