74ACT11074 Series
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset
Manufacturer: Texas Instruments
Catalog(5 parts)
| Part | Number of Elements▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Current - Quiescent (Iq)▲▼ | Trigger Type | Number of Bits per Element▲▼ | Type | Output Type | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Mounting Type | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Clock Frequency▲▼ | Function | Max Propagation Delay @ V, Max CL▲▼ | Input Capacitance▲▼ | Package / Case | Package / Case▲▼ | Package / Case▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
2 ul | 85 °C | -40 °C | 0.000003999999989900971 A | Positive Edge | 1 ul | D-Type | Complementary | 0.024000000208616257 A | 0.024000000208616257 A | Through Hole | 5.5 V | 4.5 V | 125000000 Hz | Reset, Set(Preset) | 8.499999815114734e-9 s | 3.4999999860146898e-12 F | 14-DIP | 0.007619999814778566 m | 0.007619999814778566 m | |
Texas Instruments 74ACT11074DG4Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width) | 2 ul | 85 °C | -40 °C | 0.000003999999989900971 A | Positive Edge | 1 ul | D-Type | Complementary | 0.024000000208616257 A | 0.024000000208616257 A | Surface Mount | 5.5 V | 4.5 V | 125000000 Hz | Reset, Set(Preset) | 8.499999815114734e-9 s | 3.4999999860146898e-12 F | 14-SOIC | 0.003899999894201755 m | 0.003911599982529879 m |
Texas Instruments 74ACT11074DRE4Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width) | 2 ul | 85 °C | -40 °C | 0.000003999999989900971 A | Positive Edge | 1 ul | D-Type | Complementary | 0.024000000208616257 A | 0.024000000208616257 A | Surface Mount | 5.5 V | 4.5 V | 125000000 Hz | Reset, Set(Preset) | 8.499999815114734e-9 s | 3.4999999860146898e-12 F | 14-SOIC | 0.003899999894201755 m | 0.003911599982529879 m |
Texas Instruments 74ACT11074NE4Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-DIP (0.300", 7.62mm) | 2 ul | 85 °C | -40 °C | 0.000003999999989900971 A | Positive Edge | 1 ul | D-Type | Complementary | 0.024000000208616257 A | 0.024000000208616257 A | Through Hole | 5.5 V | 4.5 V | 125000000 Hz | Reset, Set(Preset) | 8.499999815114734e-9 s | 3.4999999860146898e-12 F | 14-DIP | 0.007619999814778566 m | 0.007619999814778566 m |
Texas Instruments 74ACT11074DFlip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width) | 2 ul | 85 °C | -40 °C | 0.000003999999989900971 A | Positive Edge | 1 ul | D-Type | Complementary | 0.024000000208616257 A | 0.024000000208616257 A | Surface Mount | 5.5 V | 4.5 V | 125000000 Hz | Reset, Set(Preset) | 8.499999815114734e-9 s | 3.4999999860146898e-12 F | 14-SOIC | 0.003899999894201755 m | 0.003911599982529879 m |
Key Features
• Inputs Are TTL-Voltage CompatibleCenter-Pin VCCand GND Configurations to Minimize High-Speed Switching NoiseEPICTM(Enhanced-Performance Implanted CMOS) 1-m Process500-mA Typical Latch-Up Immunity at 125°CPackage Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (N)EPIC is a trademark of Texas Instruments Incorporated.Inputs Are TTL-Voltage CompatibleCenter-Pin VCCand GND Configurations to Minimize High-Speed Switching NoiseEPICTM(Enhanced-Performance Implanted CMOS) 1-m Process500-mA Typical Latch-Up Immunity at 125°CPackage Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (N)EPIC is a trademark of Texas Instruments Incorporated.
Description
AI
This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () input sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.
The 74ACT11074 is characterized for operation from -40°C to 85°C.
This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () input sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.
The 74ACT11074 is characterized for operation from -40°C to 85°C.