Catalog(1 parts)
| Part | Trigger Type | Number of Elements▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Package / Case | Package / Case▲▼ | Package / Case▲▼ | Count Rate▲▼ | Reset | Logic Type | Direction | Number of Bits per Element▲▼ | Mounting Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Positive Edge | 1 ul | 4.75 V | 5.25 V | 70 °C | 0 °C | 14-DIP | 0.007619999814778566 m | 0.007619999814778566 m | 42000000 Hz | Synchronous | Binary Counter | Up | 4 ul | Through Hole |
Key Features
• '290, 'LS290...DECADE COUNTERS'293, 'LS293...4–BIT BINARY COUNTERSGND and VCCon Corner Pins (Pins 7 and 14 Respectively)'290, 'LS290...DECADE COUNTERS'293, 'LS293...4–BIT BINARY COUNTERSGND and VCCon Corner Pins (Pins 7 and 14 Respectively)
Description
AI
The SN54290/SN74290, SN54LS290/SN74LS290, SN54293/SN74293, and SN54LS293/SN74LS293 counters are electrically and functionally identical to the SN5490A/SN7490A, SN54LS90/SN74LS90, SN5493A/SN7493A, and SN54LS93/SN74LS93, respectively. Only the arrangement of the terminals has been changed for the '290, 'LS290, '293, and 'LS293.
Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the '290 and 'LS290 and divide-by-eight for the '293 and 'LS293.
All of these counters have a gated zero reset and the '290 and 'LS290 also have gated set-to-nine inputs for use in BCD nine's complement applications.
To use the maximum count length (decade or four-bit binary) of these counters, the B input is connected to the QAoutput. The input count pulses are applied to input A and the outputs are as described in the appropriate function table. A symmetrical divide-by-ten count can be obtained from the '290 and 'LS290 counters by connecting the QDoutput to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA.
The SN54290/SN74290, SN54LS290/SN74LS290, SN54293/SN74293, and SN54LS293/SN74LS293 counters are electrically and functionally identical to the SN5490A/SN7490A, SN54LS90/SN74LS90, SN5493A/SN7493A, and SN54LS93/SN74LS93, respectively. Only the arrangement of the terminals has been changed for the '290, 'LS290, '293, and 'LS293.
Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the '290 and 'LS290 and divide-by-eight for the '293 and 'LS293.
All of these counters have a gated zero reset and the '290 and 'LS290 also have gated set-to-nine inputs for use in BCD nine's complement applications.
To use the maximum count length (decade or four-bit binary) of these counters, the B input is connected to the QAoutput. The input count pulses are applied to input A and the outputs are as described in the appropriate function table. A symmetrical divide-by-ten count can be obtained from the '290 and 'LS290 counters by connecting the QDoutput to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA.