SN54ALS74A Series
Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset
| Part | Function | Number of Elements [custom] | Package / Case | Max Propagation Delay @ V, Max CL | Clock Frequency | Current - Output High, Low | Output Type | Number of Bits per Element | Voltage - Supply [Max] | Voltage - Supply [Min] | Current - Quiescent (Iq) | Operating Temperature [Min] | Operating Temperature [Max] | Trigger Type | Mounting Type | Supplier Device Package [y] | Supplier Device Package | Supplier Device Package [x] | Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments JM38510/37101B2A | Reset, Set(Preset) | 2 | 20-CLCC | 23 ns | 25 MHz | 2 mA, 4 mA | Complementary | 1 | 5.5 V | 4.5 V | 4 mA | -55 C | 125 °C | Positive Edge | Surface Mount | 8.89 | 20-LCCC | 8.89 | D-Type |
Texas Instruments 8401101DA | |||||||||||||||||||
Texas Instruments 84011012A |
Key Features
• Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPsPackage Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
Description
AI
These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
The SN54ALS74A and SN54AS74A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS74A and SN74AS74A are characterized for operation from 0°C to 70°C.
These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
The SN54ALS74A and SN54AS74A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS74A and SN74AS74A are characterized for operation from 0°C to 70°C.