DAC39J82 Series
Dual-Channel, 16-Bit, 2.8-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC)
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Dual-Channel, 16-Bit, 2.8-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC)
| Part | Settling Time | Mounting Type | Differential Output | Number of Bits | Operating Temperature [Min] | Operating Temperature [Max] | Output Type | Data Interface | Architecture | INL/DNL (LSB) [Max] | INL/DNL (LSB) [Min] | Reference Type | Supplier Device Package | Voltage - Supply, Digital [Min] | Voltage - Supply, Digital [Max] | Voltage - Supply, Analog [Max] | Voltage - Supply, Analog [Min] | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments DAC39J82IAAV | 10 ns | Surface Mount | 16 bits | -40 °C | 85 °C | Current - Unbuffered | JESD204B | Current Source | 4 LSB, 6 LSB | -6 LSB, -4 LSB | External, Internal | 144-FCBGA (10x10) | 0.85 V | 0.95 V | 3.45 V | 3.15 V | 144-FBGA, FCBGA | |
Texas Instruments DAC39J82IAAVR | 10 ns | Surface Mount | 16 bits | -40 °C | 85 °C | Current - Unbuffered | JESD204B | Current Source | 4 LSB, 6 LSB | -6 LSB, -4 LSB | External, Internal | 144-FCBGA (10x10) | 0.85 V | 0.95 V | 3.45 V | 3.15 V | 144-FBGA, FCBGA |
Key Features
• Resolution: 16-BitMaximum Sample Rate: 2.8GSPSMaximum Input Data Rate: 1.4GSPSJESD204B Interface8 JESD204B Serial Input Lanes12.5 Gbps Maximum Bit Rate per LaneSubclass 1 Multi-DAC synchronizationOn-Chip Very Low Jitter PLLSelectable 1x -16x InterpolationIndependent Complex Mixers with 48-bit NCO/or ±n×Fs/8Wideband Digital Quadrature Modulator CorrectionSinx/x Correction FiltersFractional Sample Group Delay CorrectionFlexible Routing to Four Analog Outputs via OutputMultiplexer3/4-Wire Serial Control Bus (SPI)Integrated Temperature SensorJTAG Boundary ScanPin-compatible with Quad-channel DAC39J84Power Dissipation: 1.1W at 2.8GSPSPackage: 10x10mm, 144-Ball Flip-Chip BGAResolution: 16-BitMaximum Sample Rate: 2.8GSPSMaximum Input Data Rate: 1.4GSPSJESD204B Interface8 JESD204B Serial Input Lanes12.5 Gbps Maximum Bit Rate per LaneSubclass 1 Multi-DAC synchronizationOn-Chip Very Low Jitter PLLSelectable 1x -16x InterpolationIndependent Complex Mixers with 48-bit NCO/or ±n×Fs/8Wideband Digital Quadrature Modulator CorrectionSinx/x Correction FiltersFractional Sample Group Delay CorrectionFlexible Routing to Four Analog Outputs via OutputMultiplexer3/4-Wire Serial Control Bus (SPI)Integrated Temperature SensorJTAG Boundary ScanPin-compatible with Quad-channel DAC39J84Power Dissipation: 1.1W at 2.8GSPSPackage: 10x10mm, 144-Ball Flip-Chip BGA
Description
AI
The DAC39J82 is a very low power, 16-bit, dual-channel, 2.8 GSPS digital to analog converter (DAC) with JESD204B interface. The maximum input data rate is 1.4 GSPS.
Digital data is input to the device through 1, 2, 4 or 8 configurable serial JESD204B lanes running up to 12.5 Gbps with on-chip termination and programmable equalization. The interface allows JESD204B Subclass 1 SYSREF based deterministic latency and full synchronization of multiple devices.
The device includes features that simplify the design of complex transmit architectures. Fully bypassable 2x to 16x digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. An on-chip 48-bit Numerically Controlled Oscillator (NCO) and independent complex mixers allow flexible and accurate carrier placement.
A high-performance low jitter PLL simplifies clocking of the device without significant impact on the dynamic range. The digital Quadrature Modulator Correction (QMC) and Group Delay Correction (QDC) enable complete IQ compensation for gain, offset, phase, and group delay between channels in direct up-conversion applications. A programmable Power Amplifier (PA) protection mechanism is available to provide PA protection in cases when the abnormal power behavior of the input data is detected.
DAC39J82 provides four analog outputs, and the data from the internal two digital paths can be routed to any two out of these four DAC outputs via the output multiplexer.
The DAC39J82 is a very low power, 16-bit, dual-channel, 2.8 GSPS digital to analog converter (DAC) with JESD204B interface. The maximum input data rate is 1.4 GSPS.
Digital data is input to the device through 1, 2, 4 or 8 configurable serial JESD204B lanes running up to 12.5 Gbps with on-chip termination and programmable equalization. The interface allows JESD204B Subclass 1 SYSREF based deterministic latency and full synchronization of multiple devices.
The device includes features that simplify the design of complex transmit architectures. Fully bypassable 2x to 16x digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. An on-chip 48-bit Numerically Controlled Oscillator (NCO) and independent complex mixers allow flexible and accurate carrier placement.
A high-performance low jitter PLL simplifies clocking of the device without significant impact on the dynamic range. The digital Quadrature Modulator Correction (QMC) and Group Delay Correction (QDC) enable complete IQ compensation for gain, offset, phase, and group delay between channels in direct up-conversion applications. A programmable Power Amplifier (PA) protection mechanism is available to provide PA protection in cases when the abnormal power behavior of the input data is detected.
DAC39J82 provides four analog outputs, and the data from the internal two digital paths can be routed to any two out of these four DAC outputs via the output multiplexer.