74AUP1T02 Series

Low Power, 1.8/2.5/3.3-V In, 3.3-V CMOS Out, Single 2-Input Positive-NOR Gate

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Key Features

• Single-Supply Voltage TranslatorOutput Level Up to Supply VCCCMOS Level1.8 V to 3.3 V (at VCC= 3.3 V)2.5 V to 3.3 V (at VCC= 3.3 V)1.8 V to 2.5 V (at VCC= 2.5 V)3.3 V to 2.5 V (at VCC= 2.5 VSchmitt-Trigger Inputs Reject Input Noise and ProvideBetter Output Signal IntegrityIoffSupports Partial Power Down (VCC= 0 V)Very Low Static Power Consumption:0.1 µAVery Low Dynamic Power Consumption:0.9 µALatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIPb-Free Packages Available: SC-70 (DCK)2 x 2.1 x 0.65 mm (Height 1.1 mm)More Gate Options Available atwww.ti.com/littlelogicESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Single-Supply Voltage TranslatorOutput Level Up to Supply VCCCMOS Level1.8 V to 3.3 V (at VCC= 3.3 V)2.5 V to 3.3 V (at VCC= 3.3 V)1.8 V to 2.5 V (at VCC= 2.5 V)3.3 V to 2.5 V (at VCC= 2.5 VSchmitt-Trigger Inputs Reject Input Noise and ProvideBetter Output Signal IntegrityIoffSupports Partial Power Down (VCC= 0 V)Very Low Static Power Consumption:0.1 µAVery Low Dynamic Power Consumption:0.9 µALatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIPb-Free Packages Available: SC-70 (DCK)2 x 2.1 x 0.65 mm (Height 1.1 mm)More Gate Options Available atwww.ti.com/littlelogicESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)

Description

The SN74AUP1T02 performs the Boolean function Y =A + Bor Y =A•Bwith designation for logic-level translation applications with output referenced to supply VCC. AUP technology is the industry’s lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply. This product also maintains excellent signal integrity (see Figure 1 and Figure 2). The wide VCCrange of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors. Schmitt-trigger inputs (VT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition. Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions. The SN74AUP1T02 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs. The SN74AUP1T02 performs the Boolean function Y =A + Bor Y =A•Bwith designation for logic-level translation applications with output referenced to supply VCC. AUP technology is the industry’s lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply. This product also maintains excellent signal integrity (see Figure 1 and Figure 2). The wide VCCrange of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors. Schmitt-trigger inputs (VT= 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition. Ioffis a feature that allows for powered-down conditions (VCC= 0 V) and is important in portable and mobile applications. When VCC= 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions. The SN74AUP1T02 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.