74AUP2G240 Series

2-ch, 0.8-V to 3.6-V low power inverters with 3-state outputs

Catalog(3 parts)

Part	Voltage - Supply▲▼	Voltage - Supply▲▼	Number of Bits per Element▲▼	Logic Type	Package / Case▲▼	Package / Case	Package / Case▲▼	Operating Temperature▲▼	Operating Temperature▲▼	Output Type	Mounting Type	Number of Elements▲▼	Current - Output High, Low▲▼	Supplier Device Package
Texas Instruments SN74AUP2G240DCUR Buffer, Inverting 2 Element 1 Bit per Element 3-State Output 8-VSSOP	3.5999999046325684 V	0.800000011920929 V	1 ul	Buffer, Inverting	0.002311399905011058 m	8-VFSOP	0.002300000051036477 m	85 °C	-40 °C	3-State	Surface Mount	2 ul	0.004000000189989805 A, 0.004000000189989805 A
Texas Instruments SN74AUP2G240YFPR Buffer, Inverting 2 Element 1 Bit per Element 3-State Output 8-DSBGA	3.5999999046325684 V	0.800000011920929 V	1 ul	Buffer, Inverting		8-XFBGA, DSBGA		85 °C	-40 °C	3-State	Surface Mount	2 ul	0.004000000189989805 A, 0.004000000189989805 A	8-DSBGA
Texas Instruments SN74AUP2G240RSER Buffer, Inverting 2 Element 1 Bit per Element 3-State Output 8-UQFN (1.5x1.5)	3.5999999046325684 V	0.800000011920929 V	1 ul	Buffer, Inverting		8-UFQFN		85 °C	-40 °C	3-State	Surface Mount	2 ul	0.004000000189989805 A, 0.004000000189989805 A	8-UQFN (1.5x1.5)

Key Features

• Available in the Texas Instruments NanoStar™ PackageLow Static-Power Consumption(ICC= 0.9 µA Maximum)Low Dynamic-Power Consumption(Cpd= 4.2 pF Typ at 3.3 V)Low Input Capacitance (Ci= 1.5 pF Typical)Low Noise – Overshoot and Undershoot<10% of VCCIoffSupports Partial-Power-Down Mode OperationWide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.7 ns Maximum at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)NanoStar is a trademark of Texas InstrumentsAvailable in the Texas Instruments NanoStar™ PackageLow Static-Power Consumption(ICC= 0.9 µA Maximum)Low Dynamic-Power Consumption(Cpd= 4.2 pF Typ at 3.3 V)Low Input Capacitance (Ci= 1.5 pF Typical)Low Noise – Overshoot and Undershoot<10% of VCCIoffSupports Partial-Power-Down Mode OperationWide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.7 ns Maximum at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)NanoStar is a trademark of Texas Instruments

Description

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2). The SN74AUP2G240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2). The SN74AUP2G240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.