Catalog(3 parts)
| Part | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Mounting Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Package / Case▲▼ | Package / Case | Package / Case▲▼ | Number of Bits per Element▲▼ | Number of Elements▲▼ | Output Type | Supplier Device Package | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74AVC16245DGGRTransceiver, Non-Inverting 2 Element 8 Bit per Element 3-State Output 48-TSSOP | 1.399999976158142 V | 3.5999999046325684 V | Surface Mount | 85 °C | -40 °C | 0.006099999882280827 m | 48-TFSOP | 0.006095999851822853 m | 8 ul | 2 ul | 3-State | 48-TSSOP | 0.012000000104308128 A | 0.012000000104308128 A |
Texas Instruments 74AVC16245DGVRG4Transceiver, Non-Inverting 2 Element 8 Bit per Element 3-State Output 48-TVSOP | 1.399999976158142 V | 3.5999999046325684 V | Surface Mount | 85 °C | -40 °C | 48-TFSOP | 8 ul | 2 ul | 3-State | 0.012000000104308128 A | 0.012000000104308128 A | |||
Texas Instruments SN74AVC16245DGVRTransceiver, Non-Inverting 2 Element 8 Bit per Element 3-State Output 48-TVSOP | 1.399999976158142 V | 3.5999999046325684 V | Surface Mount | 85 °C | -40 °C | 48-TFSOP | 8 ul | 2 ul | 3-State | 0.012000000104308128 A | 0.012000000104308128 A |
Key Features
• Member of the Texas InstrumentsWidebusTMFamilyEPICTM(Enhanced-Performance Implanted CMOS) Submicron ProcessDOCTM(Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed DegradationLess Than 2-ns Maximum Propagation Delay at 2.5-V and 3.3-V VCCDynamic Drive Capability Is Equivalent to Standard Outputs With IOHand IOLof ±24 mA at 2.5-V VCCOvervoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data CommunicationsIoffSupports Partial-Power-Down Mode OperationESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Latch-Up Performance Exceeds 250 mA Per JESD 78Package Options Include Plastic Thin Shrink Small-Outline (DGG) and Thin Very Small-Outline (DGV) PackagesDOC, EPIC, and Widebus are trademarks of Texas Instruments Incorporated.Member of the Texas InstrumentsWidebusTMFamilyEPICTM(Enhanced-Performance Implanted CMOS) Submicron ProcessDOCTM(Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed DegradationLess Than 2-ns Maximum Propagation Delay at 2.5-V and 3.3-V VCCDynamic Drive Capability Is Equivalent to Standard Outputs With IOHand IOLof ±24 mA at 2.5-V VCCOvervoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data CommunicationsIoffSupports Partial-Power-Down Mode OperationESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Latch-Up Performance Exceeds 250 mA Per JESD 78Package Options Include Plastic Thin Shrink Small-Outline (DGG) and Thin Very Small-Outline (DGV) PackagesDOC, EPIC, and Widebus are trademarks of Texas Instruments Incorporated.
Description
AI
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOLvs IOLand VOHvs IOHcurves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports,AVC Logic Family Technology and Applications, literature number SCEA006, andDynamic Output Control (DOCTM) Circuitry Technology and Applications, literature number SCEA009.
This 16-bit (dual octal) noninverting bus transceiver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCCoperation.
The SN74AVC16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The SN74AVC16245 is characterized for operation from -40°C to 85°C.
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOLvs IOLand VOHvs IOHcurves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports,AVC Logic Family Technology and Applications, literature number SCEA006, andDynamic Output Control (DOCTM) Circuitry Technology and Applications, literature number SCEA009.
This 16-bit (dual octal) noninverting bus transceiver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCCoperation.
The SN74AVC16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The SN74AVC16245 is characterized for operation from -40°C to 85°C.