74LVTH162241 Series
16-ch, 2.7-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state outputs
Manufacturer: Texas Instruments
Catalog(4 parts)
Part | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Mounting Type | Output Type | Number of Elements▲▼ | Logic Type | Number of Bits per Element▲▼ | Supplier Device Package | Package / Case | Operating Temperature▲▼ | Operating Temperature▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Package / Case▲▼ | Package / Case▲▼ |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74LVTH162241DLBuffer, Non-Inverting 4 Element 4 Bit per Element 3-State Output 48-SSOP | 0.012000000104308128 A | 0.012000000104308128 A | Surface Mount | 3-State | 4 ul | Buffer, Non-Inverting | 4 ul | 48-SSOP | 48-BSSOP (0.295", 7.50mm Width) | 85 °C | -40 °C | 2.700000047683716 V | 3.5999999046325684 V | ||
Texas Instruments SN74LVTH162241DGGRBuffer, Non-Inverting 4 Element 4 Bit per Element 3-State Output 48-TSSOP | 0.012000000104308128 A | 0.012000000104308128 A | Surface Mount | 3-State | 4 ul | Buffer, Non-Inverting | 4 ul | 48-TSSOP | 48-TFSOP | 85 °C | -40 °C | 2.700000047683716 V | 3.5999999046325684 V | 0.006099999882280827 m | 0.006095999851822853 m |
Texas Instruments 74LVTH162241DLG4Buffer, Non-Inverting 4 Element 4 Bit per Element 3-State Output 48-SSOP | 0.012000000104308128 A | 0.012000000104308128 A | Surface Mount | 3-State | 4 ul | Buffer, Non-Inverting | 4 ul | 48-SSOP | 48-BSSOP (0.295", 7.50mm Width) | 85 °C | -40 °C | 2.700000047683716 V | 3.5999999046325684 V | ||
Texas Instruments SN74LVTH162241DLRBuffer, Non-Inverting 4 Element 4 Bit per Element 3-State Output 48-SSOP | 0.012000000104308128 A | 0.012000000104308128 A | Surface Mount | 3-State | 4 ul | Buffer, Non-Inverting | 4 ul | 48-SSOP | 48-BSSOP (0.295", 7.50mm Width) | 85 °C | -40 °C | 2.700000047683716 V | 3.5999999046325684 V |
Key Features
• Members of the Texas Instruments Widebus™ FamilyState-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power DissipationOutput Ports Have Equivalent 22-Series Resistors, So No External Resistors Are RequiredSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 500 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsWidebus is a trademark of Texas Instruments.Members of the Texas Instruments Widebus™ FamilyState-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power DissipationOutput Ports Have Equivalent 22-Series Resistors, So No External Resistors Are RequiredSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 500 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsWidebus is a trademark of Texas Instruments.
Description
AI
These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.
The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide noninverting outputs and complementary output-enable (OE andOE) inputs.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-series resistors to reduce overshoot and undershoot.
When VCCis between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V,OEshould be tied to VCCthrough a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
The SN54LVTH162241 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVTH162241 is characterized for operation from -40°C to 85°C.
These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.
The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide noninverting outputs and complementary output-enable (OE andOE) inputs.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-series resistors to reduce overshoot and undershoot.
When VCCis between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V,OEshould be tied to VCCthrough a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
The SN54LVTH162241 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVTH162241 is characterized for operation from -40°C to 85°C.