Catalog(1 parts)
| Part | Output Configuration | Voltage - Output (Min/Fixed)▲▼ | Current - Output▲▼ | PSRR▲▼ | Protection Features | Current - Quiescent (Iq)▲▼ | Number of Regulators▲▼ | Voltage - Input (Max)▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Supplier Device Package | Mounting Type | Output Type▲▼ | Control Features | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Positive | 1.7999999523162842 V | 0.05000000074505806 A | 60 ul | Over Current, Over Temperature, Reverse Polarity | 0.000028000000384054147 A | 1 ul | 10 V | 125 °C | -40 °C | SOT-23-5 | Surface Mount | 27.030000686645508 °C/W | Enable | SC-74A, SOT-753 |
Key Features
• Input voltage range:Legacy chip: 2.7V to 10V (13.5V absolute max)New chip: 2.5V to 16V (18V absolute max)Output voltage range (adjustable):Legacy chip: 1.25V to 5.5VNew chip: 1.2V to 5.5VOutput voltage range (fixed):Legacy chip: 1.5V to 5VNew chip: 1.2V to 5VMaximum output current: Up to 100mAHigh PSRR (new chip): 46dB at 1MHzOutput accuracy:Legacy chip: 3% over load and temperatureNew chip: 1.2% over load and temperatureDropout voltage:Legacy chip: 71mV (typ) at 100mA (TPS76950)New chip: 215mV (typ) at 100mA (TPS76950)Integrated fault protection:Thermal shutdownOvercurrent protectionInternal soft-start time (new chip): 750µs (typical)Output capacitor for stable operation:Legacy chip: ≥ 4.7µFNew chip: ≥ 2.2µFPackage:5-pin SOT-23, RθJA = 178.6°C/W (new chip)Input voltage range:Legacy chip: 2.7V to 10V (13.5V absolute max)New chip: 2.5V to 16V (18V absolute max)Output voltage range (adjustable):Legacy chip: 1.25V to 5.5VNew chip: 1.2V to 5.5VOutput voltage range (fixed):Legacy chip: 1.5V to 5VNew chip: 1.2V to 5VMaximum output current: Up to 100mAHigh PSRR (new chip): 46dB at 1MHzOutput accuracy:Legacy chip: 3% over load and temperatureNew chip: 1.2% over load and temperatureDropout voltage:Legacy chip: 71mV (typ) at 100mA (TPS76950)New chip: 215mV (typ) at 100mA (TPS76950)Integrated fault protection:Thermal shutdownOvercurrent protectionInternal soft-start time (new chip): 750µs (typical)Output capacitor for stable operation:Legacy chip: ≥ 4.7µFNew chip: ≥ 2.2µFPackage:5-pin SOT-23, RθJA = 178.6°C/W (new chip)
Description
AI
The TPS770 is a low-dropout (LDO) linear voltage regulator. This device supports an input voltage range from 2.5V to 16V (new chip) and up to 100mA of load current. For the new chip, the supported output range is from 1.2V to 5.0V (fixed version) or from 1.2V to 5.5V (adjustable version).
The wide input voltage range makes the device a good choice for operating from regulated rails (such as 10V or 12V). The voltage range is up to 16V for the new chip. This range allows the LDO to generate the bias voltage for a variety of applications. These applications include power microcontrollers (MCUs) and processors.
Wide bandwidth PSRR performance is greater than 70dB at 1kHz and 46dB at 1MHz (new chip). This performance helps attenuate the switching frequency of an upstream DC/DC converter and minimizes post regulator filtering. The new chip supports an internal soft-start circuit mechanism that reduces inrush current during start-up, thus allowing for smaller input capacitance.
The TPS770 is a low-dropout (LDO) linear voltage regulator. This device supports an input voltage range from 2.5V to 16V (new chip) and up to 100mA of load current. For the new chip, the supported output range is from 1.2V to 5.0V (fixed version) or from 1.2V to 5.5V (adjustable version).
The wide input voltage range makes the device a good choice for operating from regulated rails (such as 10V or 12V). The voltage range is up to 16V for the new chip. This range allows the LDO to generate the bias voltage for a variety of applications. These applications include power microcontrollers (MCUs) and processors.
Wide bandwidth PSRR performance is greater than 70dB at 1kHz and 46dB at 1MHz (new chip). This performance helps attenuate the switching frequency of an upstream DC/DC converter and minimizes post regulator filtering. The new chip supports an internal soft-start circuit mechanism that reduces inrush current during start-up, thus allowing for smaller input capacitance.