CD4019 Series

CMOS Quad AND/OR Select Gate

Catalog

CMOS Quad AND/OR Select Gate

Part	Number of Circuits	Logic Type	Output Type	Current - Output Low	Current - Output High	Operating Temperature (Max)	Operating Temperature (Min)	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Mounting Type	Package Name	Package Width	Package Length	Number of Inputs	Schmitt Trigger Input	Input Group Distribution
Texas Instruments CD4019BMT	4	AND Gate OR	Single-Ended	6.8 mA	6.8 mA	125 °C	-55 °C	3 V	18 V	Surface Mount	16-SOIC	3.9 mm	0.154 in	2	No
Texas Instruments CD4019BEG4	4	AND Gate OR	Single-Ended	6.8 mA	6.8 mA	125 °C	-55 °C	3 V	18 V	Through Hole	16-DIP 16-PDIP	7.62 mm	0.3 in	2	No
Texas Instruments CD4019BPWR	4	AND Gate OR	Single-Ended	6.8 mA	6.8 mA	125 °C	-55 °C	3 V	18 V	Surface Mount	16-TSSOP	4.4 mm	0.173 in	2	No	1
Texas Instruments CD4019BM	4	AND Gate OR	Single-Ended	6.8 mA	6.8 mA	125 °C	-55 °C	3 V	18 V	Surface Mount	16-SOIC	3.9 mm	0.154 in	2	No
Texas Instruments CD4019BPW	4	AND Gate OR	Single-Ended	6.8 mA	6.8 mA	125 °C	-55 °C	3 V	18 V	Surface Mount	16-TSSOP	4.4 mm	0.173 in	2	No
Texas Instruments CD4019BM96	4	AND Gate OR	Single-Ended	6.8 mA	6.8 mA	125 °C	-55 °C	3 V	18 V	Surface Mount	16-SOIC	3.9 mm	0.154 in	2	No
Texas Instruments CD4019BF3A	4	AND Gate OR	Single-Ended	6.8 mA	6.8 mA	125 °C	-55 °C	3 V	18 V	Through Hole	16-CDIP	7.62 mm	0.3 in	2	No
Texas Instruments CD4019BNSR	4	AND Gate OR	Single-Ended	6.8 mA	6.8 mA	125 °C	-55 °C	3 V	18 V	Surface Mount	16-SO 16-SOIC	5.3 mm	0.209 in	2	No

Catalog

CMOS Quad AND/OR Select Gate

Description

CD4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single-input OR gate. Selection is accomplished by control bits Kaand Kb. In addition to selection of either channel A or channel B information, the control bits can be applied simultaneously to accomplish the logical A + B function. The CD4019B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). CD4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single-input OR gate. Selection is accomplished by control bits Kaand Kb. In addition to selection of either channel A or channel B information, the control bits can be applied simultaneously to accomplish the logical A + B function. The CD4019B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).