74ACT1071 Series

10-Bit Bus Termination Networks With Bus Hold Function

Catalog(1 parts)

Part	Operating Temperature▲▼	Operating Temperature▲▼	Package / Case▲▼	Package / Case▲▼	Package / Case	Number of Bits▲▼	Logic Type	Mounting Type	Supply Voltage▲▼	Supply Voltage▲▼
Texas Instruments SN74ACT1071DR Bus Termination Array IC 14-SOIC	-40 °C	85 °C	0.003899999894201755 m	0.003911599982529879 m	14-SOIC	10 ul	Bus Termination Array	Surface Mount	4.5 V	5.5 V

Key Features

• Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS SystemsReduces Undershoot and Overshoot Caused By Line ReflectionsRepetitive Peak Forward Current . . . IFRM= 100 mAInputs Are TTL-Voltage CompatibleLow Power Consumption (Like CMOS)ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Center-Pin VCCand GND Configuration Minimizes High-Speed Switching NoiseDesigned to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS SystemsReduces Undershoot and Overshoot Caused By Line ReflectionsRepetitive Peak Forward Current . . . IFRM= 100 mAInputs Are TTL-Voltage CompatibleLow Power Consumption (Like CMOS)ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Center-Pin VCCand GND Configuration Minimizes High-Speed Switching Noise

Description

This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1071 prevents bus lines from floating without using pullup or pulldown resistors. The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state. The SN74ACT1071 is characterized for operation from -40°C to 85°C. This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1071 prevents bus lines from floating without using pullup or pulldown resistors. The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state. The SN74ACT1071 is characterized for operation from -40°C to 85°C.