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SN74HC138-Q1 Series

Automotive Catalog High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Invert

Manufacturer: Texas Instruments

Catalog

Automotive Catalog High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Invert

PartCurrent - Output High, Low [custom]Current - Output High, Low [custom]Mounting TypeOperating Temperature [Max]Operating Temperature [Min]CircuitVoltage - Supply [Min]Voltage - Supply [Max]TypeSupplier Device PackageIndependent CircuitsVoltage Supply SourcePackage / CasePackage / Case [x]Package / Case [y]GradeQualificationPackage / Case [custom]Package / Case [custom]Package / CasePackage / Case
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
85 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-SOIC
1
Single Supply
16-SOIC
0.154 in
3.9 mm
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
85 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-SOIC
1
Single Supply
16-SOIC
0.154 in
3.9 mm
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
125 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-TSSOP
1
Single Supply
16-TSSOP
0.173 in
4.4 mm
Automotive
AEC-Q100
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
85 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-TSSOP
1
Single Supply
16-TSSOP
0.173 in
4.4 mm
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
125 °C
-55 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-SOIC
1
Single Supply
16-SOIC
0.154 in
3.9 mm
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
125 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-TSSOP
1
Single Supply
16-TSSOP
0.173 in
4.4 mm
Automotive
AEC-Q100
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
85 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-SSOP
1
Single Supply
16-SSOP
0.209 in
5.3 mm
Texas Instruments
5.2 mA
5.2 mA
Through Hole
85 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-PDIP
1
Single Supply
16-DIP
0.3 in
7.62 mm
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
85 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-SOIC
1
Single Supply
16-SOIC
0.154 in
3.9 mm
Texas Instruments
5.2 mA
5.2 mA
Surface Mount
85 °C
-40 °C
1 x 3:8
2 V
6 V
Decoder/Demultiplexer
16-TSSOP
1
Single Supply
16-TSSOP
0.173 in
4.4 mm

Key Features

Qualified for Automotive ApplicationsSelect One of Eight Data Outputs Active LowI/O Port or Memory SelectorThree Enable Inputs to Simplify CascadingTypical Propagation Delay of 13 ns at VCC= 5 V, CL= 15 pF, TA= 25°CFanout (Over Temperature Range)Standard Outputs . . . 10 LSTTL LoadsBus Driver Outputs . . . 15 LSTTL LoadsBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICs2-V to 6-V VCCOperationHigh Noise Immunity; NILor NIH= 30% of VCC, VCC= 5 VQualified for Automotive ApplicationsSelect One of Eight Data Outputs Active LowI/O Port or Memory SelectorThree Enable Inputs to Simplify CascadingTypical Propagation Delay of 13 ns at VCC= 5 V, CL= 15 pF, TA= 25°CFanout (Over Temperature Range)Standard Outputs . . . 10 LSTTL LoadsBus Driver Outputs . . . 15 LSTTL LoadsBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICs2-V to 6-V VCCOperationHigh Noise Immunity; NILor NIH= 30% of VCC, VCC= 5 V

Description

AI
The SN74HC138 is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The SN74HC138 is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.