CD4085 Series

CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Catalog

CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Part	Operating Temperature (Max)	Operating Temperature (Min)	Number of Inputs	Input Group Distribution	Mounting Type	Package Width	Package Name	Package Length	Logic Type	Output Type	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Current - Output Low	Current - Output High	Number of Circuits	Schmitt Trigger Input
Texas Instruments CD4085BM	125 °C	-55 °C	8	2	Surface Mount	3.9 mm	14-SOIC	0.154 in	AND Gate INVERT OR	Single-Ended	3 V	18 V	6.8 mA	6.8 mA	2	No
Texas Instruments CD4085BE	125 °C	-55 °C	8	2	Through Hole	7.62 mm	14-DIP 14-PDIP	0.3 in	AND Gate INVERT OR	Single-Ended	3 V	18 V	6.8 mA	6.8 mA	2	No
Texas Instruments CD4085BPW	125 °C	-55 °C	8	2	Surface Mount	4.4 mm	14-TSSOP	0.173 in	AND Gate INVERT OR	Single-Ended	3 V	18 V	6.8 mA	6.8 mA	2	No
Texas Instruments CD4085BM96	125 °C	-55 °C	8	2	Surface Mount	3.9 mm	14-SOIC	0.154 in	AND Gate INVERT OR	Single-Ended	3 V	18 V	6.8 mA	6.8 mA	2	No
Texas Instruments CD4085BMT	125 °C	-55 °C	8	2	Surface Mount	3.9 mm	14-SOIC	0.154 in	AND Gate INVERT OR	Single-Ended	3 V	18 V	6.8 mA	6.8 mA	2	No

Catalog

CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Description

CD4085 contains a pair of AND-OR-INVERT gates, each consisting of two 2-input AND gates driving a 3-input NOR gate. Individual inhibit controls are provided for both A-O-I gates. The CD4085B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes). CD4085 contains a pair of AND-OR-INVERT gates, each consisting of two 2-input AND gates driving a 3-input NOR gate. Individual inhibit controls are provided for both A-O-I gates. The CD4085B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).