Catalog(2 parts)
Part | Number of Elements▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Output Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Mounting Type | Number of Bits per Element▲▼ | Supplier Device Package | Package / Case▲▼ | Package / Case▲▼ | Package / Case | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Package / Case▲▼ | Package / Case▲▼ |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74ALVCH16863DLRTransceiver, Non-Inverting 2 Element 9 Bit per Element 3-State Output 56-SSOP | 2 ul | 3.5999999046325684 V | 1.649999976158142 V | 3-State | 85 °C | -40 °C | Surface Mount | 9 ul | 56-SSOP | 0.007493000011891127 m | 0.007499999832361937 m | 56-BSSOP | 0.024000000208616257 A | 0.024000000208616257 A | ||
Texas Instruments SN74ALVCH16863DGGRTransceiver, Non-Inverting 2 Element 9 Bit per Element 3-State Output 56-TSSOP | 2 ul | 3.5999999046325684 V | 1.649999976158142 V | 3-State | 85 °C | -40 °C | Surface Mount | 9 ul | 56-TSSOP | 56-TFSOP | 0.024000000208616257 A | 0.024000000208616257 A | 0.006099999882280827 m | 0.006095999851822853 m |
Key Features
• Member of the Texas InstrumentsWidebusTMFamilyEPICTM(Enhanced-Performance Implanted CMOS) Submicron ProcessESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Latch-Up Performance Exceeds 250 mA Per JESD 17Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsPackage Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) PackagesEPIC and Widebus are trademarks of Texas Instruments Incorporated.Member of the Texas InstrumentsWidebusTMFamilyEPICTM(Enhanced-Performance Implanted CMOS) Submicron ProcessESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Latch-Up Performance Exceeds 250 mA Per JESD 17Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsPackage Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) PackagesEPIC and Widebus are trademarks of Texas Instruments Incorporated.
Description
AI
This 18-bit bus transceiver is designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVCH16863 is an 18-bit noninverting transceiver designed for synchronous communication between data buses. The control-function implementation minimizes external timing requirements.
The SN74ALVCH16863 can be used as two 9-bit transceivers or one 18-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable (OEAB\ or OEBA\) inputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16863 is characterized for operation from -40°C to 85°C.
This 18-bit bus transceiver is designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVCH16863 is an 18-bit noninverting transceiver designed for synchronous communication between data buses. The control-function implementation minimizes external timing requirements.
The SN74ALVCH16863 can be used as two 9-bit transceivers or one 18-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable (OEAB\ or OEBA\) inputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16863 is characterized for operation from -40°C to 85°C.