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UCC21732 Series

Automotive 5.7-kVrms ±10A single-channel isolated gate driver with 2-level turn off for IGBT/SiCFETs

Manufacturer: Texas Instruments

Catalog(3 parts)

PartVoltage - IsolationPulse Width Distortion (Max)Approval AgencySupplier Device PackageOperating TemperatureOperating TemperatureRise / Fall Time (Typ)Package / CasePropagation Delay tpLH / tpHL (Max)Common Mode Transient Immunity (Min)Current - Peak OutputTechnologyMounting TypeVoltage - Output SupplyVoltage - Output SupplyCurrent - Output High, LowCurrent - Output High, LowNumber of ChannelsGradeQualification
Texas Instruments
UCC21732DWR
10A Gate Driver Capacitive Coupling 5700Vrms 1 Channel 16-SOIC
5700 Vrms
2.999999892949745e-8 s
CQC, CSA, TUV, UL, VDE
16-SOIC
125 °C
-40 °C
2.4000000209412065e-8 s, 2.8000000540373552e-8 s
16-SOIC
1.300000036508209e-7 s
149999992832 V/s
10 A
Capacitive Coupling
Surface Mount
33 V
13 V
10 A
10 A
1 ul
Texas Instruments
UCC21732QDWQ1
10A Gate Driver Capacitive Coupling 5700Vrms 1 Channel 16-SOIC
5700 Vrms
2.999999892949745e-8 s
CQC, CSA, TUV, UL, VDE
16-SOIC
125 °C
-40 °C
2.4000000209412065e-8 s, 2.8000000540373552e-8 s
16-SOIC
1.300000036508209e-7 s
149999992832 V/s
10 A
Capacitive Coupling
Surface Mount
33 V
13 V
10 A
10 A
1 ul
Automotive
AEC-Q100
Texas Instruments
UCC21732QDWRQ1
10A Gate Driver Capacitive Coupling 5700Vrms 1 Channel 16-SOIC
5700 Vrms
2.999999892949745e-8 s
CQC, CSA, TUV, UL, VDE
16-SOIC
125 °C
-40 °C
2.4000000209412065e-8 s, 2.8000000540373552e-8 s
16-SOIC
1.300000036508209e-7 s
149999992832 V/s
10 A
Capacitive Coupling
Surface Mount
33 V
13 V
10 A
10 A
1 ul
Automotive
AEC-Q100

Key Features

5.7kVRMS single channel isolated gate driverAEC-Q100 qualified for automotive applicationsDevice temperature grade 1: –40°C to +125°C ambient operating temperature rangeDevice HBM ESD classification level 3ADevice CDM ESD classification level C3SiC MOSFETs and IGBTs up to 2121Vpk33V maximum output drive voltage (VDD-VEE)±10A drive strength and split output150V/ns minimum CMTI270ns response time fast overcurrent protectionExternal active miller clampInternal 2-level turn-off when fault happensIsolated analog sensor with PWM output forTemperature sensing with NTC, PTC or thermal diodeHigh voltage DC-Link or phase voltageAlarm FLT on over current and reset from RST/ENFast enable/disable response on RST/ENReject <40ns noise transient and pulse on input pins12V VDD UVLO with power good on RDYInputs/outputs with over/under-shoot transient voltage Immunity up to 5V130ns (maximum) propagation delay and 30ns (maximum) pulse/part skewSOIC-16 DW package with creepage and clearance distance > 8mmOperating junction temperature –40°C to 150°CSafety-related certifications:8000VPK VIOTM and 2121VPK VIORM Reinforced Isolation per DIN EN IEC 60747-17 (VDE 0884-17)5700VRMS isolation for 1 minute per UL15775.7kVRMS single channel isolated gate driverAEC-Q100 qualified for automotive applicationsDevice temperature grade 1: –40°C to +125°C ambient operating temperature rangeDevice HBM ESD classification level 3ADevice CDM ESD classification level C3SiC MOSFETs and IGBTs up to 2121Vpk33V maximum output drive voltage (VDD-VEE)±10A drive strength and split output150V/ns minimum CMTI270ns response time fast overcurrent protectionExternal active miller clampInternal 2-level turn-off when fault happensIsolated analog sensor with PWM output forTemperature sensing with NTC, PTC or thermal diodeHigh voltage DC-Link or phase voltageAlarm FLT on over current and reset from RST/ENFast enable/disable response on RST/ENReject <40ns noise transient and pulse on input pins12V VDD UVLO with power good on RDYInputs/outputs with over/under-shoot transient voltage Immunity up to 5V130ns (maximum) propagation delay and 30ns (maximum) pulse/part skewSOIC-16 DW package with creepage and clearance distance > 8mmOperating junction temperature –40°C to 150°CSafety-related certifications:8000VPK VIOTM and 2121VPK VIORM Reinforced Isolation per DIN EN IEC 60747-17 (VDE 0884-17)5700VRMS isolation for 1 minute per UL1577

Description

AI
The UCC21732-Q1 is a galvanic isolated single channel gate driver designed for SiC MOSFETs and IGBTs up to 2121V DC operating voltage with advanced protection features, best-in-class dynamic performance and robustness. The UCC21732-Q1 has up to ±10A peak source and sink current. The input side is isolated from the output side with SiO2 capacitive isolation technology, supporting up to 1.5kVRMS working voltage, 12.8kVPK surge immunity with longer than 40 years Isolation barrier life, as well as providing low part-to-part skew , >150V/ns common mode noise immunity (CMTI). The UCC21732-Q1 includes the state-of-art protection features, such as fast overcurrent and short circuit detection, shunt current sensing support, fault reporting, active miller clamp, input and output side power supply UVLO to optimize SiC and IGBT switching behavior and robustness. The isolated analog to PWM sensor can be utilized for easier temperature or voltage sensing, further increasing the drivers’ versatility and simplifying the system design effort, size and cost. The UCC21732-Q1 is a galvanic isolated single channel gate driver designed for SiC MOSFETs and IGBTs up to 2121V DC operating voltage with advanced protection features, best-in-class dynamic performance and robustness. The UCC21732-Q1 has up to ±10A peak source and sink current. The input side is isolated from the output side with SiO2 capacitive isolation technology, supporting up to 1.5kVRMS working voltage, 12.8kVPK surge immunity with longer than 40 years Isolation barrier life, as well as providing low part-to-part skew , >150V/ns common mode noise immunity (CMTI). The UCC21732-Q1 includes the state-of-art protection features, such as fast overcurrent and short circuit detection, shunt current sensing support, fault reporting, active miller clamp, input and output side power supply UVLO to optimize SiC and IGBT switching behavior and robustness. The isolated analog to PWM sensor can be utilized for easier temperature or voltage sensing, further increasing the drivers’ versatility and simplifying the system design effort, size and cost.