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SN74LV4T125 Series

Single Power Supply Quadruple Buffer GATE w/ 3-State Output CMOS Logic Level Shifter

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

Single Power Supply Quadruple Buffer GATE w/ 3-State Output CMOS Logic Level Shifter

PartVoltage - Supply [Min]Voltage - Supply [Max]Logic TypeNumber of ElementsOperating Temperature [Min]Operating Temperature [Max]Package / CasePackage / Case [custom]Package / Case [custom]Supplier Device PackageNumber of Bits per ElementCurrent - Output High, Low [custom]Current - Output High, Low [custom]Mounting TypeOutput Type
Texas Instruments
SN74LV4T125PWR
1.6 V
5.5 V
Buffer, Non-Inverting
4
-40 °C
125 °C
14-TSSOP
0.173 in
4.4 mm
14-TSSOP
1
16 mA
16 mA
Surface Mount
3-State
Texas Instruments
SN74LV4T125RGYR
1.6 V
5.5 V
Buffer, Non-Inverting
4
-40 °C
125 °C
14-VFQFN Exposed Pad
14-VQFN (3.5x3.5)
1
16 mA
16 mA
Surface Mount
3-State

Key Features

Single-Supply Voltage Translator at 5.0-V, 3.3-V, 2.5-V, and 1.8-V VCCOperating Range of 1.8 V to 5.5 VUp Translation1.2 V(1)to 1.8 V at 1.8-V VCC1.5 V(1)to 2.5 V at 2.5-V VCC1.8 V(1)to 3.3 V at 3.3-V VCC3.3 V to 5.0 V at 5.0-V VCCDown Translation3.3 V to 1.8 V at 1.8-V VCC3.3 V to 2.5 V at 2.5-V VCC5.0 V to 3.3 V at 3.3-V VCCLogic Output is Referenced to VCCCharacterized up to 50 MHz at 3.3-V VCC5.5 V Tolerance on Input Pins–40°C to 125°C Operating Temperature RangePb-Free Packages Available: SC-70 (RGY)3.5 × 3.5 × 1 mmLatch-Up Performance Exceeds 250 mA Per JESD 17Supports Standard Logic PinoutsIoffSupport Partial-Power-Down Mode OperationCMOS Output B Compatible with AUP125, LVC125(1)(1)Refer the VIH/VILand output drive for lower VCCcondition.Single-Supply Voltage Translator at 5.0-V, 3.3-V, 2.5-V, and 1.8-V VCCOperating Range of 1.8 V to 5.5 VUp Translation1.2 V(1)to 1.8 V at 1.8-V VCC1.5 V(1)to 2.5 V at 2.5-V VCC1.8 V(1)to 3.3 V at 3.3-V VCC3.3 V to 5.0 V at 5.0-V VCCDown Translation3.3 V to 1.8 V at 1.8-V VCC3.3 V to 2.5 V at 2.5-V VCC5.0 V to 3.3 V at 3.3-V VCCLogic Output is Referenced to VCCCharacterized up to 50 MHz at 3.3-V VCC5.5 V Tolerance on Input Pins–40°C to 125°C Operating Temperature RangePb-Free Packages Available: SC-70 (RGY)3.5 × 3.5 × 1 mmLatch-Up Performance Exceeds 250 mA Per JESD 17Supports Standard Logic PinoutsIoffSupport Partial-Power-Down Mode OperationCMOS Output B Compatible with AUP125, LVC125(1)(1)Refer the VIH/VILand output drive for lower VCCcondition.

Description

AI
SN74LV4T125 is a low-voltage CMOS buffer gate that operates at a wider voltage range for portable, telecom, industrial, and automotive applications. The output level is referenced to the supply voltage and is able to support 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels. The input is designed with a lower threshold circuit to match 1.8-V input logic at VCC= 3.3 V and can be used in 1.8 V to 3.3 V level-up translation. In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output at VCC= 2.5 V). The wide VCCrange of 1.8 V to 5.5 V allows the generation of desired output levels to connect to controllers or processors. The SN74LV4T125 device is designed with current-drive capability of 8 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs. SN74LV4T125 is a low-voltage CMOS buffer gate that operates at a wider voltage range for portable, telecom, industrial, and automotive applications. The output level is referenced to the supply voltage and is able to support 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels. The input is designed with a lower threshold circuit to match 1.8-V input logic at VCC= 3.3 V and can be used in 1.8 V to 3.3 V level-up translation. In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output at VCC= 2.5 V). The wide VCCrange of 1.8 V to 5.5 V allows the generation of desired output levels to connect to controllers or processors. The SN74LV4T125 device is designed with current-drive capability of 8 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.