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VSP5610 Series

16 bit, 35MSPS Four Channel Imaging Analog Front End

Manufacturer: Texas Instruments

Catalog(1 parts)

PartSupplier Device PackageMounting TypeNumber of BitsPackage / CasePower (Watts)Voltage - Supply, DigitalVoltage - Supply, DigitalVoltage - Supply, AnalogVoltage - Supply, AnalogNumber of Channels
Texas Instruments
VSP5610RSHR
4 Channel AFE 16 Bit 426 mW 56-VQFN (7x7)
56-VQFN (7x7)
Surface Mount
16 b
56-VFQFN Exposed Pad
0.4259999990463257 W
3.5999999046325684 V
3 V
3.5999999046325684 V
3 V
4 ul

Key Features

Four-Channel CCD/CMOS Signal: 2-Channel, 3-Channel, and 4-Channel SelectablePower Supply: 3.3 V Only, Typ(Built-in LDO, 3.3 V to 1.8 V)Maximum Conversion Rate:VSP5610: 35 MSPSVSP5611: 50 MSPSVSP5612: 70 MSPS16-Bit ResolutionCDS/SH SelectableMaximum Input Signal Range: 2.0 VAnalog and Digital Hybrid Gain:Analog Gain: 0.5 V/V to 3.5 V/V in3/64-V/V StepsDigital Gain: 1 V/V to 2 V/V in1/256-V/V StepsOffset Correction DAC: ±250 mV, 8-BitStandard LVDS/CMOS Selectable Output:LVDS:Data Channel: 2-Channel, 3-ChannelClock Channel: 1-Channel8-Bit/7-Bit Serializer SelectableCMOS: 4 Bits × 4, 8 Bits × 2Timing Generator:Fast Transfer Clock: Eight SignalsSlow Transfer Clock: Six SignalsTiming Adjustment Resolution: tMCLK/48Input Clamp/Input Reference Level Internal/External SelectableReference DAC: 0.5 V, 1.1 V, 1.5 V, 2 VSPI™: Three-Wire SerialGPIO: Four-PortAPPLICATIONSCopiersFacsimile MachinesScannersSPI is a trademark of Motorola.All other trademarks are the property of their respective owners.Four-Channel CCD/CMOS Signal: 2-Channel, 3-Channel, and 4-Channel SelectablePower Supply: 3.3 V Only, Typ(Built-in LDO, 3.3 V to 1.8 V)Maximum Conversion Rate:VSP5610: 35 MSPSVSP5611: 50 MSPSVSP5612: 70 MSPS16-Bit ResolutionCDS/SH SelectableMaximum Input Signal Range: 2.0 VAnalog and Digital Hybrid Gain:Analog Gain: 0.5 V/V to 3.5 V/V in3/64-V/V StepsDigital Gain: 1 V/V to 2 V/V in1/256-V/V StepsOffset Correction DAC: ±250 mV, 8-BitStandard LVDS/CMOS Selectable Output:LVDS:Data Channel: 2-Channel, 3-ChannelClock Channel: 1-Channel8-Bit/7-Bit Serializer SelectableCMOS: 4 Bits × 4, 8 Bits × 2Timing Generator:Fast Transfer Clock: Eight SignalsSlow Transfer Clock: Six SignalsTiming Adjustment Resolution: tMCLK/48Input Clamp/Input Reference Level Internal/External SelectableReference DAC: 0.5 V, 1.1 V, 1.5 V, 2 VSPI™: Three-Wire SerialGPIO: Four-PortAPPLICATIONSCopiersFacsimile MachinesScannersSPI is a trademark of Motorola.All other trademarks are the property of their respective owners.

Description

AI
The VSP5610/11/12 are high-speed, high-performance, 16-bit analog-to-digital-converters (ADCs) that have four independent sampling circuit channels for multi-output charge-coupled device (CCD) and complementary metal oxide semiconductor (CMOS) line sensors. Pixel data from the sensor are sampled by the sample/hold (SH) or correlated double sampler (CDS) circuit, and are then converted to digital data by an ADC. Data output is selectable in low-voltage differential signaling (LVDS) or CMOS modes. The VSP5610/11/12 include a programmable gain to support the pixel level inflection caused by luminance. The integrated digital-to-analog-converter (DAC) can be used to adjust the offset level for the analog input signal. Furthermore, the timing generator (TG) is integrated in these devices for the control of sensor operation. The VSP5610/11/12 use 1.65 V to 1.95 V for the core voltage and 3.0 V to 3.6 V for I/Os. The core voltage is supplied by a built-in low-dropout regulator (LDO). The VSP5610/11/12 are high-speed, high-performance, 16-bit analog-to-digital-converters (ADCs) that have four independent sampling circuit channels for multi-output charge-coupled device (CCD) and complementary metal oxide semiconductor (CMOS) line sensors. Pixel data from the sensor are sampled by the sample/hold (SH) or correlated double sampler (CDS) circuit, and are then converted to digital data by an ADC. Data output is selectable in low-voltage differential signaling (LVDS) or CMOS modes. The VSP5610/11/12 include a programmable gain to support the pixel level inflection caused by luminance. The integrated digital-to-analog-converter (DAC) can be used to adjust the offset level for the analog input signal. Furthermore, the timing generator (TG) is integrated in these devices for the control of sensor operation. The VSP5610/11/12 use 1.65 V to 1.95 V for the core voltage and 3.0 V to 3.6 V for I/Os. The core voltage is supplied by a built-in low-dropout regulator (LDO).