CD74HC4060 Series
High Speed CMOS Logic 14-Stage Binary Counter with Oscillator
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
High Speed CMOS Logic 14-Stage Binary Counter with Oscillator
Part | Voltage - Supply [Max] | Voltage - Supply [Min] | Supplier Device Package | Operating Temperature [Min] | Operating Temperature [Max] | Package / Case | Package / Case | Number of Elements [custom] | Number of Bits per Element | Logic Type | Count Rate | Mounting Type | Direction | Reset | Trigger Type | Package / Case [x] | Package / Case [x] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD74HC4060E | 6 V | 2 V | 16-PDIP | -55 C | 125 °C | 0.3 in, 7.62 mm | 16-DIP | 1 | 14 | Binary Counter | 35 MHz | Through Hole | Up | Asynchronous | Negative Edge | ||
Texas Instruments CD74HC4060M | 6 V | 2 V | 16-SOIC | -55 C | 125 °C | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | 14 | Binary Counter | 35 MHz | Surface Mount | Up | Asynchronous | Negative Edge | ||
Texas Instruments CD74HC4060PWT | 6 V | 2 V | 16-TSSOP | -55 C | 125 °C | 16-TSSOP | 1 | 14 | Binary Counter | 35 MHz | Surface Mount | Up | Asynchronous | Negative Edge | 0.173 " | 4.4 mm | |
Texas Instruments CD74HC4060PWR | 6 V | 2 V | 16-TSSOP | -55 C | 125 °C | 16-TSSOP | 1 | 14 | Binary Counter | 35 MHz | Surface Mount | Up | Asynchronous | Negative Edge | 0.173 " | 4.4 mm | |
Texas Instruments CD74HC4060M96 | 6 V | 2 V | 16-SOIC | -55 C | 125 °C | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | 14 | Binary Counter | 35 MHz | Surface Mount | Up | Asynchronous | Negative Edge | ||
Texas Instruments CD74HC4060MT | 6 V | 2 V | 16-SOIC | -55 C | 125 °C | 0.154 in, 3.9 mm Width | 16-SOIC | 1 | 14 | Binary Counter | 35 MHz | Surface Mount | Up | Asynchronous | Negative Edge |
Key Features
• Onboard OscillatorCommon ResetNegative Edge ClockingFanout (Over Temperature Range)Standard Outputs . . . . 10 LSTTL LoadsBus Driver Outputs . . . . 15 LSTTL LoadsWide Operating Temperature Range . . . –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOHData sheet acquired from Harris SemiconductorOnboard OscillatorCommon ResetNegative Edge ClockingFanout (Over Temperature Range)Standard Outputs . . . . 10 LSTTL LoadsBus Driver Outputs . . . . 15 LSTTL LoadsWide Operating Temperature Range . . . –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOHData sheet acquired from Harris Semiconductor
Description
AI
The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times.
In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels.
The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times.
In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels.