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74LVTH16652 Series

3.3 V ABT 16-Bit Bus Transceivers And Registers With 3-State Outputs

Manufacturer: Texas Instruments

Catalog(2 parts)

PartCurrent - Output High, LowPackage / CasePackage / CasePackage / CaseMounting TypeNumber of Bits per ElementVoltage - SupplyVoltage - SupplySupplier Device PackageOutput TypeOperating TemperatureOperating TemperatureNumber of ElementsPackage / CasePackage / Case
Texas Instruments
SN74LVTH16652DL
Transceiver, Non-Inverting 2 Element 8 Bit per Element 3-State Output 56-SSOP
0.03200000151991844 A, 0.06400000303983688 A
0.007493000011891127 m
0.007499999832361937 m
56-BSSOP
Surface Mount
8 ul
2.700000047683716 V
3.5999999046325684 V
56-SSOP
3-State
85 °C
-40 °C
2 ul
Texas Instruments
SN74LVTH16652DGGR
Transceiver, Non-Inverting 2 Element 8 Bit per Element 3-State Output 56-TSSOP
0.03200000151991844 A, 0.06400000303983688 A
56-TFSOP
Surface Mount
8 ul
2.700000047683716 V
3.5999999046325684 V
56-TSSOP
3-State
85 °C
-40 °C
2 ul
0.006099999882280827 m
0.006095999851822853 m

Key Features

Members of the Texas InstrumentsWidebusTMFamilyState-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power DissipationSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 500 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsWidebus is a trademark of Texas Instruments Incorporated.Members of the Texas InstrumentsWidebusTMFamilyState-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power DissipationSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 500 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsWidebus is a trademark of Texas Instruments Incorporated.

Description

AI
The 'LVTH16652 devices are 16-bit bus transceivers designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Output-enable (OEAB and OEBA\) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'LVTH16652 devices. Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it also is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA\. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last level configuration. When VCCis between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCCthrough a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH16652 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVTH16652 is characterized for operation from -40°C to 85°C. The 'LVTH16652 devices are 16-bit bus transceivers designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Output-enable (OEAB and OEBA\) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'LVTH16652 devices. Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it also is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA\. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last level configuration. When VCCis between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCCthrough a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH16652 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVTH16652 is characterized for operation from -40°C to 85°C.