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Key Features
• State-of-the-Art EPIC-IIBTMBiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17Typical VOLP(Output Ground Bounce) < 1 V at VCC= 5 V, TA= 25°CHigh-Drive Outputs (-32-mA IOH, 64-mA IOL)Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) PackageEPIC-IIB is a trademark of Texas Instruments Incorporated.State-of-the-Art EPIC-IIBTMBiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17Typical VOLP(Output Ground Bounce) < 1 V at VCC= 5 V, TA= 25°CHigh-Drive Outputs (-32-mA IOH, 64-mA IOL)Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) PackageEPIC-IIB is a trademark of Texas Instruments Incorporated.
Description
AI
The 'ABT273 are 8-bit positive-edge-triggered D-type flip-flops with a direct clear () input. They are particularly suitable for implementing buffer and storage registers, shift registers, and pattern generators.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D input signal has no effect at the output.
The SN54ABT273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT273 is characterized for operation from -40°C to 85°C.
The 'ABT273 are 8-bit positive-edge-triggered D-type flip-flops with a direct clear () input. They are particularly suitable for implementing buffer and storage registers, shift registers, and pattern generators.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D input signal has no effect at the output.
The SN54ABT273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT273 is characterized for operation from -40°C to 85°C.