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74AUP3G04 Series

3-ch, 0.8-V to 3.6-V low power inverters

Manufacturer: Texas Instruments

Catalog(3 parts)

PartSupplier Device PackageMounting TypeOperating TemperatureOperating TemperatureMax Propagation Delay @ V, Max CLLogic TypeCurrent - Quiescent (Max)Number of CircuitsVoltage - SupplyVoltage - SupplyCurrent - Output High, LowInput Logic Level - HighInput Logic Level - HighPackage / CaseNumber of Inputs
Texas Instruments
SN74AUP3G04DQER
Inverter IC 3 Channel 8-X2SON (1.4x1)
8-X2SON (1.4x1)
Surface Mount
-40 °C
85 °C
6.20000006890109e-9 s
Inverter
4.999999987376214e-7 A
3 ul
3.5999999046325684 V
0.800000011920929 V
0.004000000189989805 A, 0.004000000189989805 A
1.600000023841858 V
2 V
8-XFDFN
3 ul
Texas Instruments
SN74AUP3G04RSER
Inverter IC 3 Channel 8-UQFN (1.5x1.5)
8-UQFN (1.5x1.5)
Surface Mount
-40 °C
85 °C
6.20000006890109e-9 s
Inverter
4.999999987376214e-7 A
3 ul
3.5999999046325684 V
0.800000011920929 V
0.004000000189989805 A, 0.004000000189989805 A
1.600000023841858 V
2 V
8-UFQFN
3 ul
Texas Instruments
SN74AUP3G04YFPR
Inverter IC 3 Channel 8-DSBGA
8-DSBGA
Surface Mount
-40 °C
85 °C
6.20000006890109e-9 s
Inverter
4.999999987376214e-7 A
3 ul
3.5999999046325684 V
0.800000011920929 V
0.004000000189989805 A, 0.004000000189989805 A
1.600000023841858 V
2 V
8-XFBGA, DSBGA
3 ul

Key Features

Available in the Texas Instruments NanoStar PackageLow Static-Power Consumption(ICC= 0.9 µA Maximum)Low Dynamic-Power Consumption(Cpd= 4.3 pF Typ at 3.3 V)Low Input Capacitance (Ci= 1.5 pF Typical)Low Noise – Overshoot and Undershoot<10% of VCCIoffSupports Live Insertion, Partial PowerDown Mode,and Back Drive ProtectionWide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.3 ns Maximum at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)NanoStar Is a trademark of Texas InstrumentsAvailable in the Texas Instruments NanoStar PackageLow Static-Power Consumption(ICC= 0.9 µA Maximum)Low Dynamic-Power Consumption(Cpd= 4.3 pF Typ at 3.3 V)Low Input Capacitance (Ci= 1.5 pF Typical)Low Noise – Overshoot and Undershoot<10% of VCCIoffSupports Live Insertion, Partial PowerDown Mode,and Back Drive ProtectionWide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.3 ns Maximum at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)NanoStar Is a trademark of Texas Instruments

Description

AI
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2). The SN74AUP3G04 performs the Boolean function Y = A in positive logic. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2). The SN74AUP3G04 performs the Boolean function Y = A in positive logic. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.