CDCS503 Series

Clock buffer / clock multiplier with optional SSC

Link to Manufacturer Page: https://www.ti.com/

Catalog

Clock buffer / clock multiplier with optional SSC

Part	Operating Temperature [Min]	Operating Temperature [Max]	Ratio - Input:Output [custom]	Number of Circuits	Frequency - Max [Max]	Supplier Device Package	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case	Mounting Type	Output	Input	Qualification	Grade
Texas Instruments CDCS503PWR	-40 °C	85 °C	1:1	1	108 MHz	8-TSSOP	3.6 V	3 V	8-TSSOP (0.173", 4.40mm Width)	Surface Mount	LVCMOS	LVCMOS
Texas Instruments CDCS503PW	-40 °C	85 °C	1:1	1	108 MHz	8-TSSOP	3.6 V	3 V	8-TSSOP (0.173", 4.40mm Width)	Surface Mount	LVCMOS	LVCMOS
Texas Instruments CDCS503TPWRQ1	-40 °C	105 ░C	1:1	1	108 MHz	8-TSSOP	3.6 V	3 V	8-TSSOP (0.173", 4.40mm Width)	Surface Mount	LVCMOS	LVCMOS	AEC-Q100	Automotive

Key Features

• Part of a Family of Easy to use Clock Generator DevicesWith Optional SSCClock Multiplier With Selectable Output Frequency andSelectable SSCSSC Controllable via 2 External Pins±0%, ±0.5%, ±1%, ±2% Center SpreadFrequency Multiplication Selectable Between x1 or x4With One External Control PinOutput Disable via Control PinSingle 3.3V Device Power SupplyWide Temperature Range –40°C to 85°CLow Space Consumption by 8 Pin TSSOP PackageAPPLICATIONSConsumer and Industrial Applications requiringEMI reduction through Spread Spectrum Clockingand/or Clock MultiplicationPart of a Family of Easy to use Clock Generator DevicesWith Optional SSCClock Multiplier With Selectable Output Frequency andSelectable SSCSSC Controllable via 2 External Pins±0%, ±0.5%, ±1%, ±2% Center SpreadFrequency Multiplication Selectable Between x1 or x4With One External Control PinOutput Disable via Control PinSingle 3.3V Device Power SupplyWide Temperature Range –40°C to 85°CLow Space Consumption by 8 Pin TSSOP PackageAPPLICATIONSConsumer and Industrial Applications requiringEMI reduction through Spread Spectrum Clockingand/or Clock Multiplication

Description

The CDCS503 is a spread spectrum capable, LVCMOS Input Clock Buffer with selectable frequency multiplication. It shares major functionality with the CDCS502 but utilizes a LVCMOS input stage instead of the crystal input stage of the CDCS502. Also an Output Enable pin has been added to the CDCS503. The device accepts a 3.3V LVCMOS signal at the input. The input signal is processed by a PLL, whose output frequency is either equal to the input frequency or multiplied by the factor of 4. The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock frequency with a triangular modulation. By this, the device can generate output frequencies between 8MHz and 108MHz with or without SSC. A separate control pin can be used to enable or disable the output. The CDCS503 operates in 3.3V environment. It is characterized for operation from –40°C to 85°C, and available in an 8-pin TSSOP package. The CDCS503 is a spread spectrum capable, LVCMOS Input Clock Buffer with selectable frequency multiplication. It shares major functionality with the CDCS502 but utilizes a LVCMOS input stage instead of the crystal input stage of the CDCS502. Also an Output Enable pin has been added to the CDCS503. The device accepts a 3.3V LVCMOS signal at the input. The input signal is processed by a PLL, whose output frequency is either equal to the input frequency or multiplied by the factor of 4. The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock frequency with a triangular modulation. By this, the device can generate output frequencies between 8MHz and 108MHz with or without SSC. A separate control pin can be used to enable or disable the output. The CDCS503 operates in 3.3V environment. It is characterized for operation from –40°C to 85°C, and available in an 8-pin TSSOP package.