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74LV21 Series

2-ch, 4-input 2-V to 5.5-V high-speed (7 ns) AND gate

Manufacturer: Texas Instruments

Catalog(8 parts)

PartNumber of Circuits▲▼Current - Quiescent (Max)▲▼Package / Case▲▼Package / Case▲▼Package / CaseMounting TypeVoltage - Supply▲▼Voltage - Supply▲▼Input Logic Level - Low▲▼Current - Output High, Low▲▼Current - Output High, Low▲▼Logic TypeNumber of Inputs▲▼Max Propagation Delay @ V, Max CL▲▼Operating Temperature▲▼Operating Temperature▲▼Input Logic Level - High▲▼Package / Case▲▼Supplier Device PackagePackage / Case▲▼Package / Case▲▼Package / Case▲▼Package / Case▲▼
Texas Instruments
SN74LV21AD
AND Gate IC 2 Channel 14-SOIC
2 ul
0.000019999999494757503 A
0.003899999894201755 m
0.003911599982529879 m
14-SOIC
Surface Mount
2 V
5.5 V
0.5 V
0.012000000104308128 A
0.012000000104308128 A
AND Gate
4 ul
7.000000135093387e-9 s
-40 °C
85 °C
1.5 V
Texas Instruments
SN74LV21ADBR
AND Gate IC 2 Channel 14-SSOP
2 ul
0.000019999999494757503 A
0.0052999998442828655 m
14-SSOP
Surface Mount
2 V
5.5 V
0.5 V
0.012000000104308128 A
0.012000000104308128 A
AND Gate
4 ul
7.000000135093387e-9 s
-40 °C
85 °C
1.5 V
0.005308600142598152 m
14-SSOP
Texas Instruments
SN74LV21APWRG4
AND Gate IC 2 Channel 14-TSSOP
2 ul
0.000019999999494757503 A
14-TSSOP
Surface Mount
2 V
5.5 V
0.5 V
0.012000000104308128 A
0.012000000104308128 A
AND Gate
4 ul
7.000000135093387e-9 s
-40 °C
85 °C
1.5 V
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
Texas Instruments
SN74LV21ADR
AND Gate IC 2 Channel 14-SOIC
2 ul
0.000019999999494757503 A
0.003899999894201755 m
0.003911599982529879 m
14-SOIC
Surface Mount
2 V
5.5 V
0.5 V
0.012000000104308128 A
0.012000000104308128 A
AND Gate
4 ul
7.000000135093387e-9 s
-40 °C
85 °C
1.5 V
Texas Instruments
SN74LV21ANSR
AND Gate IC 2 Channel 14-SO
2 ul
0.000019999999494757503 A
14-SOIC
Surface Mount
2 V
5.5 V
0.5 V
0.012000000104308128 A
0.012000000104308128 A
AND Gate
4 ul
7.000000135093387e-9 s
-40 °C
85 °C
1.5 V
14-SO
0.0052999998442828655 m
0.005308600142598152 m
Texas Instruments
SN74LV21APW
AND Gate IC 2 Channel 14-TSSOP
2 ul
0.000019999999494757503 A
14-TSSOP
Surface Mount
2 V
5.5 V
0.5 V
0.012000000104308128 A
0.012000000104308128 A
AND Gate
4 ul
7.000000135093387e-9 s
-40 °C
85 °C
1.5 V
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
Texas Instruments
SN74LV21APWR
AND Gate IC 2 Channel 14-TSSOP
2 ul
0.000019999999494757503 A
14-TSSOP
Surface Mount
2 V
5.5 V
0.5 V
0.012000000104308128 A
0.012000000104308128 A
AND Gate
4 ul
7.000000135093387e-9 s
-40 °C
85 °C
1.5 V
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m
Texas Instruments
SN74LV21APWT
AND Gate IC 2 Channel 14-TSSOP
2 ul
0.000019999999494757503 A
14-TSSOP
Surface Mount
2 V
5.5 V
0.5 V
0.012000000104308128 A
0.012000000104308128 A
AND Gate
4 ul
7.000000135093387e-9 s
-40 °C
85 °C
1.5 V
14-TSSOP
0.004394200164824724 m
0.004399999976158142 m

Key Features

• 2-V to 5.5-V V CC OperationMax t pd of 6 ns at 5 VTypical V OLP (Output Ground Bounce) <0.8 V at V CC = 3.3 V, T A = 25°CTypical V OHV (Output V OH Undershoot) >2.3 V at V CC = 3.3 V, TA = 25°CI off Supports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class II2-V to 5.5-V V CC OperationMax t pd of 6 ns at 5 VTypical V OLP (Output Ground Bounce) <0.8 V at V CC = 3.3 V, T A = 25°CTypical V OHV (Output V OH Undershoot) >2.3 V at V CC = 3.3 V, TA = 25°CI off Supports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Description

AI
These dual 4-input positive-AND gates are designed for 2-V to 5.5-V V CC operation. The SN74LV21A devices perform the Boolean function Y = A • B • C • D in positive logic. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. These dual 4-input positive-AND gates are designed for 2-V to 5.5-V V CC operation. The SN74LV21A devices perform the Boolean function Y = A • B • C • D in positive logic. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.