74LS109 Series

Catalog

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

Part	Operating Temperature (Max)	Function	Current - Output High	Current - Output Low	Number of Elements	Package Length	Package Name	Package Width	Number of Bits per Element	Current - Quiescent (Iq)	Output Type	Type	Trigger Type	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Mounting Type	Clock Frequency	Max Propagation Delay	Max CL
Texas Instruments SN74LS109AN	70 °C	Set(Preset) and Reset	400 µA	8 mA	2	0.3 in	16-DIP 16-PDIP	7.62 mm	1 bits	8 mA	Complementary	JK Type	Positive Edge	5.25 V	4.75 V	Through Hole	33 MHz	40 ns	15 pF
Texas Instruments SN74LS109ANSR	70 °C	Set(Preset) and Reset	400 µA	8 mA	2	0.209 in	16-SO 16-SOIC	5.3 mm	1 bits	8 mA	Complementary	JK Type	Positive Edge	5.25 V	4.75 V	Surface Mount	33 MHz	25 ns	15 pF
Texas Instruments SN74LS109ANG4	70 °C	Set(Preset) and Reset	400 µA	8 mA	2	0.3 in	16-DIP 16-PDIP	7.62 mm	1 bits	8 mA	Complementary	JK Type	Positive Edge	5.25 V	4.75 V	Through Hole	33 MHz	25 ns	15 pF
Texas Instruments SN74LS109ADRE4	70 °C	Set(Preset) and Reset	400 µA	8 mA	2	0.154 in	16-SOIC	3.9 mm	1 bits	8 mA	Complementary	JK Type	Positive Edge	5.25 V	4.75 V	Surface Mount	33 MHz	25 ns	15 pF
Texas Instruments SN74LS109AD	70 °C	Set(Preset) and Reset	400 µA	8 mA	2	0.154 in	16-SOIC	3.9 mm	1 bits	8 mA	Complementary	JK Type	Positive Edge	5.25 V	4.75 V	Surface Mount	33 MHz	40 ns	15 pF
Texas Instruments SN74LS109ADR	70 °C	Set(Preset) and Reset	400 µA	8 mA	2	0.154 in	16-SOIC	3.9 mm	1 bits	8 mA	Complementary	JK Type	Positive Edge	5.25 V	4.75 V	Surface Mount	33 MHz	40 ns	15 pF