Catalog(8 parts)
| Part | Logic Type | Package / Case | Operating Temperature▲▼ | Operating Temperature▲▼ | Number of Bits▲▼ | Supplier Device Package | Mounting Type | Package / Case▲▼ | Package / Case▲▼ |
|---|---|---|---|---|---|---|---|---|---|
Voltage Clamp | 48-BSSOP (0.295", 7.50mm Width) | -40 °C | 85 °C | 22 ul | 48-SSOP | Surface Mount | |||
Voltage Clamp | 48-TFSOP | -40 °C | 85 °C | 22 ul | 48-TSSOP | Surface Mount | 0.006099999882280827 m | 0.006095999851822853 m | |
Voltage Clamp | 48-BSSOP (0.295", 7.50mm Width) | -40 °C | 85 °C | 22 ul | 48-SSOP | Surface Mount | |||
Voltage Clamp | 48-TFSOP | -40 °C | 85 °C | 22 ul | 48-TSSOP | Surface Mount | 0.006099999882280827 m | 0.006095999851822853 m | |
Voltage Clamp | 48-TFSOP | -40 °C | 85 °C | 22 ul | Surface Mount | ||||
Voltage Clamp | 48-BSSOP (0.295", 7.50mm Width) | -40 °C | 85 °C | 22 ul | 48-SSOP | Surface Mount |
Key Features
• Member of the Texas Instruments Widebus™ FamilyDesigned to Be Used in Voltage-Limiting Applications6.5-On-State Connection Between Ports A and BFlow-Through Pinout for Ease of Printed Circuit Board Trace RoutingDirect Interface With GTL+ LevelsESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Widebus and TI are trademarks of Texas Instruments.Member of the Texas Instruments Widebus™ FamilyDesigned to Be Used in Voltage-Limiting Applications6.5-On-State Connection Between Ports A and BFlow-Through Pinout for Ease of Printed Circuit Board Trace RoutingDirect Interface With GTL+ LevelsESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Widebus and TI are trademarks of Texas Instruments.
Description
AI
The SN74TVC16222A provides 23 parallel NMOS pass transistors with a common gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device can be used as a 22-bit switch, with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots. (SeeApplication Informationin this data sheet.)
All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can be used as the reference transistor. Because, within the device, the characteristics from transistor to transistor are equal, the maximum output high-state voltage (VOH) is approximately the reference voltage (VREF), with minimal deviation from one output to another. This is a benefit of the TVC solution over discrete devices. Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the low-voltage side, and the I/O signals are bidirectional through each FET.
The SN74TVC16222A provides 23 parallel NMOS pass transistors with a common gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device can be used as a 22-bit switch, with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots. (SeeApplication Informationin this data sheet.)
All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can be used as the reference transistor. Because, within the device, the characteristics from transistor to transistor are equal, the maximum output high-state voltage (VOH) is approximately the reference voltage (VREF), with minimal deviation from one output to another. This is a benefit of the TVC solution over discrete devices. Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the low-voltage side, and the I/O signals are bidirectional through each FET.